blob: 25e5c2409dcbbc6a3c81e85596d2dc2e1aa0179b [file] [log] [blame]
Ron Madrid9ff89b72009-01-22 15:05:24 -08001/*
2 * Copyright (C) Freescale Semiconductor, Inc. 2006-2007
3 * Copyright (C) Sheldon Instruments, Inc. 2008
4 *
5 * Author: Ron Madrid <info@sheldoninst.com>
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <common.h>
27#include <libfdt.h>
28#include <pci.h>
29#include <mpc83xx.h>
30#include <ns16550.h>
31#include <nand.h>
32
33DECLARE_GLOBAL_DATA_PTR;
34
35int checkboard(void)
36{
37 puts("Board: Sheldon Instruments SIMPC8313\n");
38 return 0;
39}
40
41#ifndef CONFIG_NAND_SPL
42static struct pci_region pci_regions[] = {
43 {
44 bus_start: CONFIG_SYS_PCI1_MEM_BASE,
45 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
46 size: CONFIG_SYS_PCI1_MEM_SIZE,
47 flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
48 },
49 {
50 bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
51 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
52 size: CONFIG_SYS_PCI1_MMIO_SIZE,
53 flags: PCI_REGION_MEM
54 },
55 {
56 bus_start: CONFIG_SYS_PCI1_IO_BASE,
57 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
58 size: CONFIG_SYS_PCI1_IO_SIZE,
59 flags: PCI_REGION_IO
60 }
61};
62
63void pci_init_board(void)
64{
65 volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
66 volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
67 volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
68 struct pci_region *reg[] = { pci_regions };
69 int warmboot;
70
71 /* Enable all 3 PCI_CLK_OUTPUTs. */
72 clk->occr |= 0xe0000000;
73
74 /*
75 * Configure PCI Local Access Windows
76 */
77 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
78 pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB;
79
80 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
81 pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
82
83 warmboot = gd->bd->bi_bootflags & BOOTFLAG_WARM;
84
85 mpc83xx_pci_init(1, reg, warmboot);
86}
87
88/*
89 * Miscellaneous late-boot configurations
90 */
91int misc_init_r(void)
92{
93 int rc = 0;
94
95 return rc;
96}
97
98#if defined(CONFIG_OF_BOARD_SETUP)
99void ft_board_setup(void *blob, bd_t *bd)
100{
101 ft_cpu_setup(blob, bd);
102#ifdef CONFIG_PCI
103 ft_pci_setup(blob, bd);
104#endif
105}
106#endif
107#else /* CONFIG_NAND_SPL */
108void board_init_f(ulong bootflag)
109{
110 NS16550_init((NS16550_t)(CONFIG_SYS_IMMR + 0x4500),
111 CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE);
112 puts("NAND boot... ");
113 init_timebase();
114 initdram(0);
115 relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000, (gd_t *)gd,
116 CONFIG_SYS_NAND_U_BOOT_RELOC);
117}
118
119void board_init_r(gd_t *gd, ulong dest_addr)
120{
121 nand_boot();
122}
123
124void putc(char c)
125{
126 if (gd->flags & GD_FLG_SILENT)
127 return;
128
129 if (c == '\n')
130 NS16550_putc((NS16550_t)(CONFIG_SYS_IMMR + 0x4500), '\r');
131
132 NS16550_putc((NS16550_t)(CONFIG_SYS_IMMR + 0x4500), c);
133}
134#endif