Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Kumar Gala | 6bf7e46 | 2010-12-15 04:52:48 -0600 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2010 Freescale Semiconductor, Inc. |
Kumar Gala | 6bf7e46 | 2010-12-15 04:52:48 -0600 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <config.h> |
| 7 | #include <common.h> |
| 8 | #include <asm/io.h> |
| 9 | #include <asm/immap_86xx.h> |
| 10 | #include <asm/fsl_serdes.h> |
| 11 | |
| 12 | #define SRDS1_MAX_LANES 4 |
| 13 | #define SRDS2_MAX_LANES 4 |
| 14 | |
| 15 | static u32 serdes1_prtcl_map, serdes2_prtcl_map; |
| 16 | |
| 17 | static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { |
| 18 | [0x1] = {PCIE1, PCIE1, PCIE1, PCIE1}, |
| 19 | [0x4] = {PCIE1, PCIE1, PCIE1, PCIE1}, |
| 20 | [0x7] = {NONE, NONE, NONE, NONE}, |
| 21 | }; |
| 22 | |
| 23 | static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = { |
| 24 | [0x0] = {PCIE2, PCIE2, PCIE2, PCIE2}, |
| 25 | [0x4] = {PCIE2, PCIE2, PCIE2, PCIE2}, |
| 26 | [0x7] = {NONE, NONE, NONE, NONE}, |
| 27 | }; |
| 28 | |
| 29 | int is_serdes_configured(enum srds_prtcl device) |
| 30 | { |
Hou Zhiqiang | b435ae9 | 2016-08-02 19:03:22 +0800 | [diff] [blame] | 31 | int ret; |
| 32 | |
| 33 | if (!(serdes1_prtcl_map & (1 << NONE))) |
| 34 | fsl_serdes_init(); |
| 35 | |
| 36 | ret = (1 << device) & serdes1_prtcl_map; |
Kumar Gala | 6bf7e46 | 2010-12-15 04:52:48 -0600 | [diff] [blame] | 37 | |
| 38 | if (ret) |
| 39 | return ret; |
| 40 | |
Hou Zhiqiang | b435ae9 | 2016-08-02 19:03:22 +0800 | [diff] [blame] | 41 | if (!(serdes2_prtcl_map & (1 << NONE))) |
| 42 | fsl_serdes_init(); |
| 43 | |
Kumar Gala | 6bf7e46 | 2010-12-15 04:52:48 -0600 | [diff] [blame] | 44 | return (1 << device) & serdes2_prtcl_map; |
| 45 | } |
| 46 | |
| 47 | void fsl_serdes_init(void) |
| 48 | { |
| 49 | immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR; |
| 50 | ccsr_gur_t *gur = &immap->im_gur; |
| 51 | u32 pordevsr = in_be32(&gur->pordevsr); |
| 52 | u32 srds_cfg = (pordevsr & MPC8610_PORDEVSR_IO_SEL) >> |
| 53 | MPC8610_PORDEVSR_IO_SEL_SHIFT; |
| 54 | int lane; |
| 55 | |
Hou Zhiqiang | b435ae9 | 2016-08-02 19:03:22 +0800 | [diff] [blame] | 56 | if (serdes1_prtcl_map & (1 << NONE) && |
| 57 | serdes2_prtcl_map & (1 << NONE)) |
| 58 | return; |
| 59 | |
Kumar Gala | 6bf7e46 | 2010-12-15 04:52:48 -0600 | [diff] [blame] | 60 | debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); |
| 61 | |
Axel Lin | ab95b09 | 2013-05-26 15:00:30 +0800 | [diff] [blame] | 62 | if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { |
Kumar Gala | 6bf7e46 | 2010-12-15 04:52:48 -0600 | [diff] [blame] | 63 | printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); |
| 64 | return; |
| 65 | } |
| 66 | for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { |
| 67 | enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; |
| 68 | serdes1_prtcl_map |= (1 << lane_prtcl); |
| 69 | } |
| 70 | |
Hou Zhiqiang | b435ae9 | 2016-08-02 19:03:22 +0800 | [diff] [blame] | 71 | /* Set the first bit to indicate serdes has been initialized */ |
| 72 | serdes1_prtcl_map |= (1 << NONE); |
| 73 | |
Axel Lin | ab95b09 | 2013-05-26 15:00:30 +0800 | [diff] [blame] | 74 | if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { |
Kumar Gala | 6bf7e46 | 2010-12-15 04:52:48 -0600 | [diff] [blame] | 75 | printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); |
| 76 | return; |
| 77 | } |
| 78 | |
| 79 | for (lane = 0; lane < SRDS2_MAX_LANES; lane++) { |
| 80 | enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane]; |
| 81 | serdes2_prtcl_map |= (1 << lane_prtcl); |
| 82 | } |
Hou Zhiqiang | b435ae9 | 2016-08-02 19:03:22 +0800 | [diff] [blame] | 83 | |
| 84 | /* Set the first bit to indicate serdes has been initialized */ |
| 85 | serdes2_prtcl_map |= (1 << NONE); |
Kumar Gala | 6bf7e46 | 2010-12-15 04:52:48 -0600 | [diff] [blame] | 86 | } |