blob: 8f03ed28763d5871e6d71f51797c518987e028e9 [file] [log] [blame]
Julien Massoncfa0e162023-12-04 11:48:55 +01001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2023 MediaTek Inc.
4 * Copyright (C) 2023 BayLibre, SAS
5 * Author: Julien Masson <jmasson@baylibre.com>
6 * Author: Fabien Parent <fparent@baylibre.com>
7 */
8
9#include <asm/global_data.h>
10#include <asm/system.h>
11#include <dm/uclass.h>
12#include <wdt.h>
13
14DECLARE_GLOBAL_DATA_PTR;
15
16int dram_init(void)
17{
18 return fdtdec_setup_mem_size_base();
19}
20
21int dram_init_banksize(void)
22{
23 gd->bd->bi_dram[0].start = gd->ram_base;
24 gd->bd->bi_dram[0].size = gd->ram_size;
25
26 return 0;
27}
28
29int mtk_soc_early_init(void)
30{
31 return 0;
32}
33
34void reset_cpu(void)
35{
36 struct udevice *wdt;
37
38 if (IS_ENABLED(CONFIG_PSCI_RESET)) {
39 psci_system_reset();
40 } else {
41 uclass_first_device(UCLASS_WDT, &wdt);
42 if (wdt)
43 wdt_expire_now(wdt, 0);
44 }
45}
46
47int print_cpuinfo(void)
48{
49 printf("CPU: MediaTek MT8365\n");
50 return 0;
51}