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Hans de Goede9c4f11d2015-01-11 20:34:48 +01001/*
2 * Allwinner SUNXI "glue layer"
3 *
4 * Copyright © 2015 Hans de Goede <hdegoede@redhat.com>
5 * Copyright © 2013 Jussi Kivilinna <jussi.kivilinna@iki.fi>
6 *
7 * Based on the sw_usb "Allwinner OTG Dual Role Controller" code.
8 * Copyright 2007-2012 (C) Allwinner Technology Co., Ltd.
9 * javen <javen@allwinnertech.com>
10 *
11 * Based on the DA8xx "glue layer" code.
12 * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
13 * Copyright (C) 2005-2006 by Texas Instruments
14 *
15 * This file is part of the Inventra Controller Driver for Linux.
16 *
17 * The Inventra Controller Driver for Linux is free software; you
18 * can redistribute it and/or modify it under the terms of the GNU
19 * General Public License version 2 as published by the Free Software
20 * Foundation.
21 *
22 */
23#include <common.h>
24#include <asm/arch/cpu.h>
Hans de Goede7e5aabd2015-04-27 11:44:22 +020025#include <asm/arch/clock.h>
Hans de Goedeeaa0d702015-02-16 22:13:43 +010026#include <asm/arch/gpio.h>
Hans de Goede26a90052015-04-27 15:05:10 +020027#include <asm/arch/usb_phy.h>
Hans de Goedeeaa0d702015-02-16 22:13:43 +010028#include <asm-generic/gpio.h>
Hans de Goede9c4f11d2015-01-11 20:34:48 +010029#include "linux-compat.h"
30#include "musb_core.h"
Chen-Yu Tsai68341532015-03-09 15:44:16 +080031#ifdef CONFIG_AXP152_POWER
32#include <axp152.h>
33#endif
34#ifdef CONFIG_AXP209_POWER
35#include <axp209.h>
36#endif
37#ifdef CONFIG_AXP221_POWER
38#include <axp221.h>
39#endif
Hans de Goede9c4f11d2015-01-11 20:34:48 +010040
41/******************************************************************************
42 ******************************************************************************
43 * From the Allwinner driver
44 ******************************************************************************
45 ******************************************************************************/
46
47/******************************************************************************
48 * From include/sunxi_usb_bsp.h
49 ******************************************************************************/
50
51/* reg offsets */
52#define USBC_REG_o_ISCR 0x0400
53#define USBC_REG_o_PHYCTL 0x0404
54#define USBC_REG_o_PHYBIST 0x0408
55#define USBC_REG_o_PHYTUNE 0x040c
56
57#define USBC_REG_o_VEND0 0x0043
58
59/* Interface Status and Control */
60#define USBC_BP_ISCR_VBUS_VALID_FROM_DATA 30
61#define USBC_BP_ISCR_VBUS_VALID_FROM_VBUS 29
62#define USBC_BP_ISCR_EXT_ID_STATUS 28
63#define USBC_BP_ISCR_EXT_DM_STATUS 27
64#define USBC_BP_ISCR_EXT_DP_STATUS 26
65#define USBC_BP_ISCR_MERGED_VBUS_STATUS 25
66#define USBC_BP_ISCR_MERGED_ID_STATUS 24
67
68#define USBC_BP_ISCR_ID_PULLUP_EN 17
69#define USBC_BP_ISCR_DPDM_PULLUP_EN 16
70#define USBC_BP_ISCR_FORCE_ID 14
71#define USBC_BP_ISCR_FORCE_VBUS_VALID 12
72#define USBC_BP_ISCR_VBUS_VALID_SRC 10
73
74#define USBC_BP_ISCR_HOSC_EN 7
75#define USBC_BP_ISCR_VBUS_CHANGE_DETECT 6
76#define USBC_BP_ISCR_ID_CHANGE_DETECT 5
77#define USBC_BP_ISCR_DPDM_CHANGE_DETECT 4
78#define USBC_BP_ISCR_IRQ_ENABLE 3
79#define USBC_BP_ISCR_VBUS_CHANGE_DETECT_EN 2
80#define USBC_BP_ISCR_ID_CHANGE_DETECT_EN 1
81#define USBC_BP_ISCR_DPDM_CHANGE_DETECT_EN 0
82
83/******************************************************************************
84 * From usbc/usbc.c
85 ******************************************************************************/
86
87static u32 USBC_WakeUp_ClearChangeDetect(u32 reg_val)
88{
89 u32 temp = reg_val;
90
91 temp &= ~(1 << USBC_BP_ISCR_VBUS_CHANGE_DETECT);
92 temp &= ~(1 << USBC_BP_ISCR_ID_CHANGE_DETECT);
93 temp &= ~(1 << USBC_BP_ISCR_DPDM_CHANGE_DETECT);
94
95 return temp;
96}
97
98static void USBC_EnableIdPullUp(__iomem void *base)
99{
100 u32 reg_val;
101
102 reg_val = musb_readl(base, USBC_REG_o_ISCR);
103 reg_val |= (1 << USBC_BP_ISCR_ID_PULLUP_EN);
104 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
105 musb_writel(base, USBC_REG_o_ISCR, reg_val);
106}
107
108static void USBC_DisableIdPullUp(__iomem void *base)
109{
110 u32 reg_val;
111
112 reg_val = musb_readl(base, USBC_REG_o_ISCR);
113 reg_val &= ~(1 << USBC_BP_ISCR_ID_PULLUP_EN);
114 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
115 musb_writel(base, USBC_REG_o_ISCR, reg_val);
116}
117
118static void USBC_EnableDpDmPullUp(__iomem void *base)
119{
120 u32 reg_val;
121
122 reg_val = musb_readl(base, USBC_REG_o_ISCR);
123 reg_val |= (1 << USBC_BP_ISCR_DPDM_PULLUP_EN);
124 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
125 musb_writel(base, USBC_REG_o_ISCR, reg_val);
126}
127
128static void USBC_DisableDpDmPullUp(__iomem void *base)
129{
130 u32 reg_val;
131
132 reg_val = musb_readl(base, USBC_REG_o_ISCR);
133 reg_val &= ~(1 << USBC_BP_ISCR_DPDM_PULLUP_EN);
134 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
135 musb_writel(base, USBC_REG_o_ISCR, reg_val);
136}
137
138static void USBC_ForceIdToLow(__iomem void *base)
139{
140 u32 reg_val;
141
142 reg_val = musb_readl(base, USBC_REG_o_ISCR);
143 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID);
144 reg_val |= (0x02 << USBC_BP_ISCR_FORCE_ID);
145 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
146 musb_writel(base, USBC_REG_o_ISCR, reg_val);
147}
148
149static void USBC_ForceIdToHigh(__iomem void *base)
150{
151 u32 reg_val;
152
153 reg_val = musb_readl(base, USBC_REG_o_ISCR);
154 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID);
155 reg_val |= (0x03 << USBC_BP_ISCR_FORCE_ID);
156 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
157 musb_writel(base, USBC_REG_o_ISCR, reg_val);
158}
159
Hans de Goede9c4f11d2015-01-11 20:34:48 +0100160static void USBC_ForceVbusValidToHigh(__iomem void *base)
161{
162 u32 reg_val;
163
164 reg_val = musb_readl(base, USBC_REG_o_ISCR);
165 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
166 reg_val |= (0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
167 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
168 musb_writel(base, USBC_REG_o_ISCR, reg_val);
169}
170
171static void USBC_ConfigFIFO_Base(void)
172{
173 u32 reg_value;
174
175 /* config usb fifo, 8kb mode */
176 reg_value = readl(SUNXI_SRAMC_BASE + 0x04);
177 reg_value &= ~(0x03 << 0);
178 reg_value |= (1 << 0);
179 writel(reg_value, SUNXI_SRAMC_BASE + 0x04);
180}
181
182/******************************************************************************
183 * MUSB Glue code
184 ******************************************************************************/
185
186static irqreturn_t sunxi_musb_interrupt(int irq, void *__hci)
187{
188 struct musb *musb = __hci;
189 irqreturn_t retval = IRQ_NONE;
190
191 /* read and flush interrupts */
192 musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
193 if (musb->int_usb)
194 musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb);
195 musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
196 if (musb->int_tx)
197 musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx);
198 musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
199 if (musb->int_rx)
200 musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx);
201
202 if (musb->int_usb || musb->int_tx || musb->int_rx)
203 retval |= musb_interrupt(musb);
204
205 return retval;
206}
207
208static void sunxi_musb_enable(struct musb *musb)
209{
210 pr_debug("%s():\n", __func__);
211
212 /* select PIO mode */
213 musb_writeb(musb->mregs, USBC_REG_o_VEND0, 0);
214
215 if (is_host_enabled(musb)) {
216 /* port power on */
Hans de Goede86979092015-04-27 14:54:47 +0200217 sunxi_usb_phy_power_on(0);
Hans de Goede9c4f11d2015-01-11 20:34:48 +0100218 }
219}
220
221static void sunxi_musb_disable(struct musb *musb)
222{
Hans de Goede7e5aabd2015-04-27 11:44:22 +0200223 struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
224
Hans de Goede9c4f11d2015-01-11 20:34:48 +0100225 pr_debug("%s():\n", __func__);
226
227 /* Put the controller back in a pristane state for "usb reset" */
228 if (musb->is_active) {
Hans de Goede86979092015-04-27 14:54:47 +0200229 sunxi_usb_phy_exit(0);
Hans de Goede7e5aabd2015-04-27 11:44:22 +0200230#ifdef CONFIG_SUNXI_GEN_SUN6I
231 clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
232#endif
233 clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
234
235 mdelay(10);
236
237 setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
238#ifdef CONFIG_SUNXI_GEN_SUN6I
239 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
240#endif
Hans de Goede86979092015-04-27 14:54:47 +0200241 sunxi_usb_phy_init(0);
Hans de Goede9c4f11d2015-01-11 20:34:48 +0100242 musb->is_active = 0;
243 }
244}
245
246static int sunxi_musb_init(struct musb *musb)
247{
Hans de Goede7e5aabd2015-04-27 11:44:22 +0200248 struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
Hans de Goede9c4f11d2015-01-11 20:34:48 +0100249 int err;
250
251 pr_debug("%s():\n", __func__);
252
Hans de Goede86979092015-04-27 14:54:47 +0200253 err = sunxi_usb_phy_probe(0);
Paul Kocialkowski7e9b7de2015-03-22 18:07:12 +0100254 if (err)
255 return err;
Hans de Goedeeaa0d702015-02-16 22:13:43 +0100256
Paul Kocialkowski7e9b7de2015-03-22 18:07:12 +0100257 if (is_host_enabled(musb)) {
Hans de Goede86979092015-04-27 14:54:47 +0200258 err = sunxi_usb_phy_vbus_detect(0);
Hans de Goedeeaa0d702015-02-16 22:13:43 +0100259 if (err) {
260 eprintf("Error: A charger is plugged into the OTG\n");
Hans de Goede86979092015-04-27 14:54:47 +0200261 sunxi_usb_phy_remove(0);
Hans de Goedeeaa0d702015-02-16 22:13:43 +0100262 return -EIO;
263 }
Hans de Goedeeaa0d702015-02-16 22:13:43 +0100264 }
265
Hans de Goede9c4f11d2015-01-11 20:34:48 +0100266 musb->isr = sunxi_musb_interrupt;
Hans de Goede7e5aabd2015-04-27 11:44:22 +0200267
268 setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
269#ifdef CONFIG_SUNXI_GEN_SUN6I
270 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
271#endif
Hans de Goede86979092015-04-27 14:54:47 +0200272 sunxi_usb_phy_init(0);
Hans de Goede9c4f11d2015-01-11 20:34:48 +0100273
274 USBC_ConfigFIFO_Base();
275 USBC_EnableDpDmPullUp(musb->mregs);
276 USBC_EnableIdPullUp(musb->mregs);
277
278 if (is_host_enabled(musb)) {
279 /* Host mode */
280 USBC_ForceIdToLow(musb->mregs);
Hans de Goede9c4f11d2015-01-11 20:34:48 +0100281 } else {
282 /* Peripheral mode */
283 USBC_ForceIdToHigh(musb->mregs);
Hans de Goede9c4f11d2015-01-11 20:34:48 +0100284 }
Hans de Goedef2b45c82015-02-11 09:05:18 +0100285 USBC_ForceVbusValidToHigh(musb->mregs);
Hans de Goede9c4f11d2015-01-11 20:34:48 +0100286
287 return 0;
288}
289
290static int sunxi_musb_exit(struct musb *musb)
291{
292 pr_debug("%s():\n", __func__);
293
294 USBC_DisableDpDmPullUp(musb->mregs);
295 USBC_DisableIdPullUp(musb->mregs);
Hans de Goede86979092015-04-27 14:54:47 +0200296 sunxi_usb_phy_power_off(0);
297 sunxi_usb_phy_exit(0);
Hans de Goede9c4f11d2015-01-11 20:34:48 +0100298
Hans de Goede86979092015-04-27 14:54:47 +0200299 return sunxi_usb_phy_remove(0);
Hans de Goede9c4f11d2015-01-11 20:34:48 +0100300}
301
302const struct musb_platform_ops sunxi_musb_ops = {
303 .init = sunxi_musb_init,
304 .exit = sunxi_musb_exit,
305
306 .enable = sunxi_musb_enable,
307 .disable = sunxi_musb_disable,
308};