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Michael Trimarchie30a3362008-11-28 13:22:09 +01001/*
Ramneek Mehresh3fb68ee2011-03-23 15:20:43 +05302 * (C) Copyright 2009, 2011 Freescale Semiconductor, Inc.
Vivek Mahajan288f7fb2009-05-25 17:23:16 +05303 *
Michael Trimarchie30a3362008-11-28 13:22:09 +01004 * (C) Copyright 2008, Excito Elektronik i Sk=E5ne AB
5 *
6 * Author: Tor Krill tor@excito.com
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <pci.h>
26#include <usb.h>
Michael Trimarchie30a3362008-11-28 13:22:09 +010027#include <asm/io.h>
Vivek Mahajan288f7fb2009-05-25 17:23:16 +053028#include <usb/ehci-fsl.h>
Ramneek Mehresh3fb68ee2011-03-23 15:20:43 +053029#include <hwconfig.h>
Michael Trimarchie30a3362008-11-28 13:22:09 +010030
Jean-Christophe PLAGNIOL-VILLARD8f6bcf42009-04-03 12:46:58 +020031#include "ehci.h"
Michael Trimarchie30a3362008-11-28 13:22:09 +010032
Shengzhou Liud407e1f2012-10-22 13:18:24 +080033/* Check USB PHY clock valid */
34static int usb_phy_clk_valid(struct usb_ehci *ehci)
35{
36 if (!((in_be32(&ehci->control) & PHY_CLK_VALID) ||
37 in_be32(&ehci->prictrl))) {
38 printf("USB PHY clock invalid!\n");
39 return 0;
40 } else {
41 return 1;
42 }
43}
44
Michael Trimarchie30a3362008-11-28 13:22:09 +010045/*
46 * Create the appropriate control structures to manage
47 * a new EHCI host controller.
48 *
49 * Excerpts from linux ehci fsl driver.
50 */
Lucas Stach3494a4c2012-09-26 00:14:35 +020051int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
Michael Trimarchie30a3362008-11-28 13:22:09 +010052{
Vivek Mahajan288f7fb2009-05-25 17:23:16 +053053 struct usb_ehci *ehci;
Ramneek Mehresh3fb68ee2011-03-23 15:20:43 +053054 const char *phy_type = NULL;
55 size_t len;
Kumar Gala7b83c352011-11-09 10:04:15 -060056#ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
57 char usb_phy[5];
Ramneek Mehresh3fb68ee2011-03-23 15:20:43 +053058
59 usb_phy[0] = '\0';
Kumar Gala7b83c352011-11-09 10:04:15 -060060#endif
Michael Trimarchie30a3362008-11-28 13:22:09 +010061
Damien Dusha7c3be662010-10-14 15:27:06 +020062 ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
Lucas Stach3494a4c2012-09-26 00:14:35 +020063 *hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
64 *hcor = (struct ehci_hcor *)((uint32_t) *hccr +
65 HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
Michael Trimarchie30a3362008-11-28 13:22:09 +010066
Michael Trimarchie30a3362008-11-28 13:22:09 +010067 /* Set to Host mode */
Vivek Mahajan32c52202009-06-19 17:56:00 +053068 setbits_le32(&ehci->usbmode, CM_HOST);
Michael Trimarchie30a3362008-11-28 13:22:09 +010069
Vivek Mahajan32c52202009-06-19 17:56:00 +053070 out_be32(&ehci->snoop1, SNOOP_SIZE_2GB);
71 out_be32(&ehci->snoop2, 0x80000000 | SNOOP_SIZE_2GB);
Michael Trimarchie30a3362008-11-28 13:22:09 +010072
73 /* Init phy */
Ramneek Mehresh3fb68ee2011-03-23 15:20:43 +053074 if (hwconfig_sub("usb1", "phy_type"))
75 phy_type = hwconfig_subarg("usb1", "phy_type", &len);
Vivek Mahajan288f7fb2009-05-25 17:23:16 +053076 else
Ramneek Mehresh3fb68ee2011-03-23 15:20:43 +053077 phy_type = getenv("usb_phy_type");
78
79 if (!phy_type) {
80#ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
81 /* if none specified assume internal UTMI */
82 strcpy(usb_phy, "utmi");
83 phy_type = usb_phy;
84#else
85 printf("WARNING: USB phy type not defined !!\n");
86 return -1;
87#endif
88 }
89
90 if (!strcmp(phy_type, "utmi")) {
91#if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
92 setbits_be32(&ehci->control, PHY_CLK_SEL_UTMI);
93 setbits_be32(&ehci->control, UTMI_PHY_EN);
94 udelay(1000); /* delay required for PHY Clk to appear */
95#endif
Lucas Stach3494a4c2012-09-26 00:14:35 +020096 out_le32(&(*hcor)->or_portsc[0], PORT_PTS_UTMI);
Shengzhou Liud407e1f2012-10-22 13:18:24 +080097 setbits_be32(&ehci->control, USB_EN);
Ramneek Mehresh3fb68ee2011-03-23 15:20:43 +053098 } else {
Ramneek Mehresh3fb68ee2011-03-23 15:20:43 +053099 setbits_be32(&ehci->control, PHY_CLK_SEL_ULPI);
Shengzhou Liud407e1f2012-10-22 13:18:24 +0800100 clrsetbits_be32(&ehci->control, UTMI_PHY_EN, USB_EN);
Ramneek Mehresh3fb68ee2011-03-23 15:20:43 +0530101 udelay(1000); /* delay required for PHY Clk to appear */
Shengzhou Liud407e1f2012-10-22 13:18:24 +0800102 if (!usb_phy_clk_valid(ehci))
103 return -EINVAL;
Lucas Stach3494a4c2012-09-26 00:14:35 +0200104 out_le32(&(*hcor)->or_portsc[0], PORT_PTS_ULPI);
Ramneek Mehresh3fb68ee2011-03-23 15:20:43 +0530105 }
Michael Trimarchie30a3362008-11-28 13:22:09 +0100106
Vivek Mahajan32c52202009-06-19 17:56:00 +0530107 out_be32(&ehci->prictrl, 0x0000000c);
108 out_be32(&ehci->age_cnt_limit, 0x00000040);
109 out_be32(&ehci->sictrl, 0x00000001);
Michael Trimarchie30a3362008-11-28 13:22:09 +0100110
Vivek Mahajan32c52202009-06-19 17:56:00 +0530111 in_le32(&ehci->usbmode);
Michael Trimarchie30a3362008-11-28 13:22:09 +0100112
113 return 0;
114}
115
116/*
117 * Destroy the appropriate control structures corresponding
118 * the the EHCI host controller.
119 */
Lucas Stach3494a4c2012-09-26 00:14:35 +0200120int ehci_hcd_stop(int index)
Michael Trimarchie30a3362008-11-28 13:22:09 +0100121{
122 return 0;
123}