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Patrice Chotarde5f82cf2017-07-18 09:29:02 +02001/*
2 * This header provides constants for the STM32F7 RCC IP
3 */
4
5#ifndef _DT_BINDINGS_MFD_STM32F7_RCC_H
6#define _DT_BINDINGS_MFD_STM32F7_RCC_H
7
8/* AHB1 */
9#define STM32F7_RCC_AHB1_GPIOA 0
10#define STM32F7_RCC_AHB1_GPIOB 1
11#define STM32F7_RCC_AHB1_GPIOC 2
12#define STM32F7_RCC_AHB1_GPIOD 3
13#define STM32F7_RCC_AHB1_GPIOE 4
14#define STM32F7_RCC_AHB1_GPIOF 5
15#define STM32F7_RCC_AHB1_GPIOG 6
16#define STM32F7_RCC_AHB1_GPIOH 7
17#define STM32F7_RCC_AHB1_GPIOI 8
18#define STM32F7_RCC_AHB1_GPIOJ 9
19#define STM32F7_RCC_AHB1_GPIOK 10
20#define STM32F7_RCC_AHB1_CRC 12
21#define STM32F7_RCC_AHB1_BKPSRAM 18
22#define STM32F7_RCC_AHB1_DTCMRAM 20
23#define STM32F7_RCC_AHB1_DMA1 21
24#define STM32F7_RCC_AHB1_DMA2 22
25#define STM32F7_RCC_AHB1_DMA2D 23
26#define STM32F7_RCC_AHB1_ETHMAC 25
27#define STM32F7_RCC_AHB1_ETHMACTX 26
28#define STM32F7_RCC_AHB1_ETHMACRX 27
29#define STM32FF_RCC_AHB1_ETHMACPTP 28
30#define STM32F7_RCC_AHB1_OTGHS 29
31#define STM32F7_RCC_AHB1_OTGHSULPI 30
32
33#define STM32F7_AHB1_RESET(bit) (STM32F7_RCC_AHB1_##bit + (0x10 * 8))
34#define STM32F7_AHB1_CLOCK(bit) (STM32F7_RCC_AHB1_##bit)
35
36
37/* AHB2 */
38#define STM32F7_RCC_AHB2_DCMI 0
39#define STM32F7_RCC_AHB2_CRYP 4
40#define STM32F7_RCC_AHB2_HASH 5
41#define STM32F7_RCC_AHB2_RNG 6
42#define STM32F7_RCC_AHB2_OTGFS 7
43
44#define STM32F7_AHB2_RESET(bit) (STM32F7_RCC_AHB2_##bit + (0x14 * 8))
45#define STM32F7_AHB2_CLOCK(bit) (STM32F7_RCC_AHB2_##bit + 0x20)
46
47/* AHB3 */
48#define STM32F7_RCC_AHB3_FMC 0
49#define STM32F7_RCC_AHB3_QSPI 1
50
51#define STM32F7_AHB3_RESET(bit) (STM32F7_RCC_AHB3_##bit + (0x18 * 8))
52#define STM32F7_AHB3_CLOCK(bit) (STM32F7_RCC_AHB3_##bit + 0x40)
53
54/* APB1 */
55#define STM32F7_RCC_APB1_TIM2 0
56#define STM32F7_RCC_APB1_TIM3 1
57#define STM32F7_RCC_APB1_TIM4 2
58#define STM32F7_RCC_APB1_TIM5 3
59#define STM32F7_RCC_APB1_TIM6 4
60#define STM32F7_RCC_APB1_TIM7 5
61#define STM32F7_RCC_APB1_TIM12 6
62#define STM32F7_RCC_APB1_TIM13 7
63#define STM32F7_RCC_APB1_TIM14 8
64#define STM32F7_RCC_APB1_LPTIM1 9
65#define STM32F7_RCC_APB1_WWDG 11
66#define STM32F7_RCC_APB1_SPI2 14
67#define STM32F7_RCC_APB1_SPI3 15
68#define STM32F7_RCC_APB1_SPDIFRX 16
69#define STM32F7_RCC_APB1_UART2 17
70#define STM32F7_RCC_APB1_UART3 18
71#define STM32F7_RCC_APB1_UART4 19
72#define STM32F7_RCC_APB1_UART5 20
73#define STM32F7_RCC_APB1_I2C1 21
74#define STM32F7_RCC_APB1_I2C2 22
75#define STM32F7_RCC_APB1_I2C3 23
76#define STM32F7_RCC_APB1_I2C4 24
77#define STM32F7_RCC_APB1_CAN1 25
78#define STM32F7_RCC_APB1_CAN2 26
79#define STM32F7_RCC_APB1_CEC 27
80#define STM32F7_RCC_APB1_PWR 28
81#define STM32F7_RCC_APB1_DAC 29
82#define STM32F7_RCC_APB1_UART7 30
83#define STM32F7_RCC_APB1_UART8 31
84
85#define STM32F7_APB1_RESET(bit) (STM32F7_RCC_APB1_##bit + (0x20 * 8))
86#define STM32F7_APB1_CLOCK(bit) (STM32F7_RCC_APB1_##bit + 0x80)
87
88/* APB2 */
89#define STM32F7_RCC_APB2_TIM1 0
90#define STM32F7_RCC_APB2_TIM8 1
91#define STM32F7_RCC_APB2_USART1 4
92#define STM32F7_RCC_APB2_USART6 5
Patrice Chotard369d4832017-11-15 13:14:52 +010093#define STM32F7_RCC_APB2_SDMMC2 7
Patrice Chotarde5f82cf2017-07-18 09:29:02 +020094#define STM32F7_RCC_APB2_ADC1 8
95#define STM32F7_RCC_APB2_ADC2 9
96#define STM32F7_RCC_APB2_ADC3 10
97#define STM32F7_RCC_APB2_SDMMC1 11
98#define STM32F7_RCC_APB2_SPI1 12
99#define STM32F7_RCC_APB2_SPI4 13
100#define STM32F7_RCC_APB2_SYSCFG 14
101#define STM32F7_RCC_APB2_TIM9 16
102#define STM32F7_RCC_APB2_TIM10 17
103#define STM32F7_RCC_APB2_TIM11 18
104#define STM32F7_RCC_APB2_SPI5 20
105#define STM32F7_RCC_APB2_SPI6 21
106#define STM32F7_RCC_APB2_SAI1 22
107#define STM32F7_RCC_APB2_SAI2 23
108#define STM32F7_RCC_APB2_LTDC 26
109
110#define STM32F7_APB2_RESET(bit) (STM32F7_RCC_APB2_##bit + (0x24 * 8))
111#define STM32F7_APB2_CLOCK(bit) (STM32F7_RCC_APB2_##bit + 0xA0)
112
113#endif /* _DT_BINDINGS_MFD_STM32F7_RCC_H */