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John Rigby6478a752010-01-25 23:12:58 -07001/*
2 * (C) Copyright 2009 DENX Software Engineering
3 * Author: John Rigby <jrigby@gmail.com>
4 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02005 * SPDX-License-Identifier: GPL-2.0+
John Rigby6478a752010-01-25 23:12:58 -07006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +000011#include <asm/arch/imx-regs.h>
John Rigby6478a752010-01-25 23:12:58 -070012
13/*
14 * KARO TX25 board - SoC Configuration
15 */
John Rigby6478a752010-01-25 23:12:58 -070016#define CONFIG_MX25
John Rigby6478a752010-01-25 23:12:58 -070017#define CONFIG_MX25_CLK32 32000 /* OSC32K frequency */
Rob Herringc4d1a0e2013-10-04 10:22:44 -050018#define CONFIG_SYS_TIMER_RATE CONFIG_MX25_CLK32
19#define CONFIG_SYS_TIMER_COUNTER \
20 (&((struct gpt_regs *)IMX_GPT1_BASE)->counter)
John Rigby6478a752010-01-25 23:12:58 -070021
22#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for U-Boot */
23
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +000024#define CONFIG_SPL
25#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
26#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
27#define CONFIG_SPL_MAX_SIZE 2048
28#define CONFIG_SPL_NAND_SUPPORT
Andreas Bießmann5e9cf222013-04-18 22:48:49 +000029#define CONFIG_SPL_LIBGENERIC_SUPPORT
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +000030
31#define CONFIG_SPL_TEXT_BASE 0x810c0000
32#define CONFIG_SYS_TEXT_BASE 0x81200000
John Rigby6478a752010-01-25 23:12:58 -070033
Stefano Babiceedb6b72011-10-28 10:23:02 +020034#ifndef MACH_TYPE_TX25
35#define MACH_TYPE_TX25 2177
36#endif
37
38#define CONFIG_MACH_TYPE MACH_TYPE_TX25
39
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +000040#ifdef CONFIG_SPL_BUILD
John Rigby6478a752010-01-25 23:12:58 -070041/* Start copying real U-boot from the second page */
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +000042#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
John Rigby6478a752010-01-25 23:12:58 -070043#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x30000
Heiko Schocher0e2412a2010-09-17 13:10:42 +020044
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +000045#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
Heiko Schocher0e2412a2010-09-17 13:10:42 +020046#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
John Rigby6478a752010-01-25 23:12:58 -070047
48#define CONFIG_SYS_NAND_PAGE_SIZE 2048
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +000049#define CONFIG_SYS_NAND_OOBSIZE 64
John Rigby6478a752010-01-25 23:12:58 -070050#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
51#define CONFIG_SYS_NAND_PAGE_COUNT 64
52#define CONFIG_SYS_NAND_SIZE (128 * 1024 * 1024)
53#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
54#else
55#define CONFIG_SKIP_LOWLEVEL_INIT
John Rigby6478a752010-01-25 23:12:58 -070056#endif
57
58#define CONFIG_DISPLAY_CPUINFO
59
Fabio Estevam7682c762011-08-30 05:44:15 +000060#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
61#define CONFIG_SETUP_MEMORY_TAGS
62#define CONFIG_INITRD_TAG
John Rigby6478a752010-01-25 23:12:58 -070063
64/*
65 * Memory Info
66 */
67/* malloc() len */
68#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
John Rigby6478a752010-01-25 23:12:58 -070069/*
70 * Board has 2 32MB banks of DRAM but there is a bug when using
71 * both so only the first is configured
72 */
73#define CONFIG_NR_DRAM_BANKS 1
74
75#define PHYS_SDRAM_1 0x80000000
76#define PHYS_SDRAM_1_SIZE 0x02000000
77#if (CONFIG_NR_DRAM_BANKS == 2)
78#define PHYS_SDRAM_2 0x90000000
79#define PHYS_SDRAM_2_SIZE 0x02000000
80#endif
81/* 8MB DRAM test */
82#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
83#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1+0x0800000)
John Rigby6478a752010-01-25 23:12:58 -070084
85/*
86 * Serial Info
87 */
Fabio Estevam7682c762011-08-30 05:44:15 +000088#define CONFIG_MXC_UART
Stefano Babic1ca47d92011-11-22 15:22:39 +010089#define CONFIG_MXC_UART_BASE UART1_BASE
John Rigby6478a752010-01-25 23:12:58 -070090#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
91#define CONFIG_BAUDRATE 115200 /* Default baud rate */
John Rigby6478a752010-01-25 23:12:58 -070092
Fabio Estevam0fcce182011-08-29 04:27:06 +000093#define CONFIG_MXC_GPIO
94
John Rigby6478a752010-01-25 23:12:58 -070095/*
96 * Flash & Environment
97 */
98/* No NOR flash present */
Fabio Estevam7682c762011-08-30 05:44:15 +000099#define CONFIG_SYS_NO_FLASH
John Rigby6478a752010-01-25 23:12:58 -0700100#define CONFIG_ENV_IS_IN_NAND
101#define CONFIG_ENV_OFFSET CONFIG_SYS_MONITOR_LEN
102#define CONFIG_ENV_SIZE (128 * 1024) /* 128 kB NAND block size */
103#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
104
105/* NAND */
106#define CONFIG_NAND_MXC
John Rigby6478a752010-01-25 23:12:58 -0700107#define CONFIG_MXC_NAND_REGS_BASE (0xBB000000)
108#define CONFIG_SYS_MAX_NAND_DEVICE 1
109#define CONFIG_SYS_NAND_BASE (0xBB000000)
110#define CONFIG_JFFS2_NAND
111#define CONFIG_MXC_NAND_HWECC
112#define CONFIG_SYS_NAND_LARGEPAGE
113
John Rigby6478a752010-01-25 23:12:58 -0700114/* U-Boot general configuration */
John Rigby6478a752010-01-25 23:12:58 -0700115#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
116/* Print buffer sz */
117#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
118 sizeof(CONFIG_SYS_PROMPT) + 16)
119#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
120/* Boot Argument Buffer Size */
121#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
122#define CONFIG_CMDLINE_EDITING
123#define CONFIG_SYS_LONGHELP
124
125/* U-Boot commands */
126#include <config_cmd_default.h>
127#define CONFIG_CMD_NAND
Heiko Schocher54433092010-09-17 13:10:30 +0200128#define CONFIG_CMD_CACHE
John Rigby6478a752010-01-25 23:12:58 -0700129
130/*
131 * Ethernet
132 */
133#define CONFIG_FEC_MXC
134#define CONFIG_FEC_MXC_PHYADDR 0x1f
135#define CONFIG_MII
136#define CONFIG_CMD_NET
Helmut Raigerd5a184b2011-10-20 04:19:47 +0000137#define CONFIG_BOARD_LATE_INIT
John Rigby6478a752010-01-25 23:12:58 -0700138#define CONFIG_ENV_OVERWRITE
139
140#define CONFIG_BOOTDELAY 5
141
142#define CONFIG_LOADADDR 0x81000000 /* loadaddr env var */
143#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
144
John Rigby6478a752010-01-25 23:12:58 -0700145#define CONFIG_EXTRA_ENV_SETTINGS \
146 "netdev=eth0\0" \
147 "nfsargs=setenv bootargs root=/dev/nfs rw " \
148 "nfsroot=${serverip}:${rootpath}\0" \
149 "ramargs=setenv bootargs root=/dev/ram rw\0" \
150 "addip=setenv bootargs ${bootargs} " \
151 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
152 ":${hostname}:${netdev}:off panic=1\0" \
153 "addtty=setenv bootargs ${bootargs}" \
154 " console=ttymxc0,${baudrate}\0" \
155 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
156 "addmisc=setenv bootargs ${bootargs}\0" \
157 "u-boot=tx25/u-boot.bin\0" \
Marek Vasutfd5ba892012-09-23 17:41:23 +0200158 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
John Rigby6478a752010-01-25 23:12:58 -0700159 "hostname=tx25\0" \
160 "bootfile=tx25/uImage\0" \
161 "rootpath=/opt/eldk/arm\0" \
162 "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
163 "run nfsargs addip addtty addmtd addmisc;" \
164 "bootm\0" \
165 "bootcmd=run net_nfs\0" \
166 "load=tftp ${loadaddr} ${u-boot}\0" \
167 "update=nand erase 0 40000;nand write ${loadaddr} 0 40000\0" \
168 "upd=run load update\0" \
169
Heiko Schocherd6d60622010-09-22 14:06:33 +0200170/* additions for new relocation code, must be added to all boards */
Heiko Schocher0e2412a2010-09-17 13:10:42 +0200171#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +0000172#define CONFIG_SYS_INIT_SP_ADDR (IMX_RAM_BASE + IMX_RAM_SIZE)
Heiko Schocher0e2412a2010-09-17 13:10:42 +0200173
John Rigby6478a752010-01-25 23:12:58 -0700174#endif /* __CONFIG_H */