blob: 84908e6154c568a3382381aeda2baeaa3ebef01e [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glass93335fd2015-11-26 19:51:23 -07002/*
3 * PCI auto-configuration library
4 *
5 * Author: Matt Porter <mporter@mvista.com>
6 *
7 * Copyright 2000 MontaVista Software Inc.
8 *
9 * Modifications for driver model:
10 * Copyright 2015 Google, Inc
11 * Written by Simon Glass <sjg@chromium.org>
Simon Glass93335fd2015-11-26 19:51:23 -070012 */
13
14#include <common.h>
15#include <dm.h>
16#include <errno.h>
17#include <pci.h>
18
19void pciauto_region_init(struct pci_region *res)
20{
21 /*
22 * Avoid allocating PCI resources from address 0 -- this is illegal
23 * according to PCI 2.1 and moreover, this is known to cause Linux IDE
Bin Mengf95cfeb2019-06-05 07:26:44 -070024 * drivers to fail. Use a reasonable starting value of 0x1000 instead
25 * if the bus start address is below 0x1000.
Simon Glass93335fd2015-11-26 19:51:23 -070026 */
Bin Mengf95cfeb2019-06-05 07:26:44 -070027 res->bus_lower = res->bus_start < 0x1000 ? 0x1000 : res->bus_start;
Simon Glass93335fd2015-11-26 19:51:23 -070028}
29
30void pciauto_region_align(struct pci_region *res, pci_size_t size)
31{
32 res->bus_lower = ((res->bus_lower - 1) | (size - 1)) + 1;
33}
34
35int pciauto_region_allocate(struct pci_region *res, pci_size_t size,
Tuomas Tynkkynenf20b7182018-05-14 19:38:13 +030036 pci_addr_t *bar, bool supports_64bit)
Simon Glass93335fd2015-11-26 19:51:23 -070037{
38 pci_addr_t addr;
39
40 if (!res) {
Tuomas Tynkkynen928aec72018-05-14 19:38:12 +030041 debug("No resource\n");
Simon Glass93335fd2015-11-26 19:51:23 -070042 goto error;
43 }
44
45 addr = ((res->bus_lower - 1) | (size - 1)) + 1;
46
47 if (addr - res->bus_start + size > res->size) {
48 debug("No room in resource");
49 goto error;
50 }
51
Tuomas Tynkkynenf20b7182018-05-14 19:38:13 +030052 if (upper_32_bits(addr) && !supports_64bit) {
53 debug("Cannot assign 64-bit address to 32-bit-only resource\n");
54 goto error;
55 }
56
Simon Glass93335fd2015-11-26 19:51:23 -070057 res->bus_lower = addr + size;
58
Tuomas Tynkkynen928aec72018-05-14 19:38:12 +030059 debug("address=0x%llx bus_lower=0x%llx\n", (unsigned long long)addr,
Simon Glass93335fd2015-11-26 19:51:23 -070060 (unsigned long long)res->bus_lower);
61
62 *bar = addr;
63 return 0;
64
65 error:
66 *bar = (pci_addr_t)-1;
67 return -1;
68}
69
Simon Glass8186aa02016-02-29 15:25:35 -070070static void pciauto_show_region(const char *name, struct pci_region *region)
71{
72 pciauto_region_init(region);
73 debug("PCI Autoconfig: Bus %s region: [%llx-%llx],\n"
74 "\t\tPhysical Memory [%llx-%llxx]\n", name,
75 (unsigned long long)region->bus_start,
76 (unsigned long long)(region->bus_start + region->size - 1),
77 (unsigned long long)region->phys_start,
78 (unsigned long long)(region->phys_start + region->size - 1));
79}
80
Simon Glass93335fd2015-11-26 19:51:23 -070081void pciauto_config_init(struct pci_controller *hose)
82{
83 int i;
84
85 hose->pci_io = NULL;
86 hose->pci_mem = NULL;
87 hose->pci_prefetch = NULL;
88
89 for (i = 0; i < hose->region_count; i++) {
90 switch (hose->regions[i].flags) {
91 case PCI_REGION_IO:
92 if (!hose->pci_io ||
93 hose->pci_io->size < hose->regions[i].size)
94 hose->pci_io = hose->regions + i;
95 break;
96 case PCI_REGION_MEM:
97 if (!hose->pci_mem ||
98 hose->pci_mem->size < hose->regions[i].size)
99 hose->pci_mem = hose->regions + i;
100 break;
101 case (PCI_REGION_MEM | PCI_REGION_PREFETCH):
102 if (!hose->pci_prefetch ||
103 hose->pci_prefetch->size < hose->regions[i].size)
104 hose->pci_prefetch = hose->regions + i;
105 break;
106 }
107 }
108
Simon Glass93335fd2015-11-26 19:51:23 -0700109
Simon Glass8186aa02016-02-29 15:25:35 -0700110 if (hose->pci_mem)
111 pciauto_show_region("Memory", hose->pci_mem);
112 if (hose->pci_prefetch)
113 pciauto_show_region("Prefetchable Mem", hose->pci_prefetch);
114 if (hose->pci_io)
115 pciauto_show_region("I/O", hose->pci_io);
Simon Glass93335fd2015-11-26 19:51:23 -0700116}