Dirk Eibach | c3213b8 | 2011-10-03 23:13:51 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2011 |
| 3 | * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | /* |
| 25 | * Driver for NXP's pca9698 40 bit I2C gpio expander |
| 26 | */ |
| 27 | |
| 28 | #include <common.h> |
| 29 | #include <i2c.h> |
Dirk Eibach | bae3a22 | 2011-10-31 09:39:12 +0100 | [diff] [blame] | 30 | #include <asm/errno.h> |
Dirk Eibach | c3213b8 | 2011-10-03 23:13:51 +0000 | [diff] [blame] | 31 | #include <pca9698.h> |
| 32 | |
| 33 | /* |
| 34 | * The pca9698 registers |
| 35 | */ |
| 36 | |
| 37 | #define PCA9698_REG_INPUT 0x00 |
| 38 | #define PCA9698_REG_OUTPUT 0x08 |
| 39 | #define PCA9698_REG_POLARITY 0x10 |
| 40 | #define PCA9698_REG_CONFIG 0x18 |
| 41 | |
| 42 | #define PCA9698_BUFFER_SIZE 5 |
Dirk Eibach | bae3a22 | 2011-10-31 09:39:12 +0100 | [diff] [blame] | 43 | #define PCA9698_GPIO_COUNT 40 |
Dirk Eibach | c3213b8 | 2011-10-03 23:13:51 +0000 | [diff] [blame] | 44 | |
Dirk Eibach | bae3a22 | 2011-10-31 09:39:12 +0100 | [diff] [blame] | 45 | static int pca9698_read40(u8 addr, u8 offset, u8 *buffer) |
Dirk Eibach | c3213b8 | 2011-10-03 23:13:51 +0000 | [diff] [blame] | 46 | { |
| 47 | u8 command = offset | 0x80; /* autoincrement */ |
| 48 | |
Dirk Eibach | bae3a22 | 2011-10-31 09:39:12 +0100 | [diff] [blame] | 49 | return i2c_read(addr, command, 1, buffer, PCA9698_BUFFER_SIZE); |
Dirk Eibach | c3213b8 | 2011-10-03 23:13:51 +0000 | [diff] [blame] | 50 | } |
| 51 | |
Dirk Eibach | bae3a22 | 2011-10-31 09:39:12 +0100 | [diff] [blame] | 52 | static int pca9698_write40(u8 addr, u8 offset, u8 *buffer) |
Dirk Eibach | c3213b8 | 2011-10-03 23:13:51 +0000 | [diff] [blame] | 53 | { |
| 54 | u8 command = offset | 0x80; /* autoincrement */ |
| 55 | |
Dirk Eibach | bae3a22 | 2011-10-31 09:39:12 +0100 | [diff] [blame] | 56 | return i2c_write(addr, command, 1, buffer, PCA9698_BUFFER_SIZE); |
Dirk Eibach | c3213b8 | 2011-10-03 23:13:51 +0000 | [diff] [blame] | 57 | } |
| 58 | |
| 59 | static void pca9698_set_bit(unsigned gpio, u8 *buffer, unsigned value) |
| 60 | { |
| 61 | unsigned byte = gpio / 8; |
| 62 | unsigned bit = gpio % 8; |
| 63 | |
| 64 | if (value) |
| 65 | buffer[byte] |= (1 << bit); |
| 66 | else |
| 67 | buffer[byte] &= ~(1 << bit); |
| 68 | } |
| 69 | |
Dirk Eibach | bae3a22 | 2011-10-31 09:39:12 +0100 | [diff] [blame] | 70 | int pca9698_request(unsigned gpio, const char *label) |
| 71 | { |
| 72 | if (gpio >= PCA9698_GPIO_COUNT) |
| 73 | return -EINVAL; |
| 74 | |
| 75 | return 0; |
| 76 | } |
| 77 | |
| 78 | void pca9698_free(unsigned gpio) |
| 79 | { |
| 80 | } |
| 81 | |
| 82 | int pca9698_direction_input(u8 addr, unsigned gpio) |
Dirk Eibach | c3213b8 | 2011-10-03 23:13:51 +0000 | [diff] [blame] | 83 | { |
| 84 | u8 data[PCA9698_BUFFER_SIZE]; |
| 85 | int res; |
| 86 | |
Dirk Eibach | bae3a22 | 2011-10-31 09:39:12 +0100 | [diff] [blame] | 87 | res = pca9698_read40(addr, PCA9698_REG_CONFIG, data); |
Dirk Eibach | c3213b8 | 2011-10-03 23:13:51 +0000 | [diff] [blame] | 88 | if (res) |
| 89 | return res; |
| 90 | |
Dirk Eibach | bae3a22 | 2011-10-31 09:39:12 +0100 | [diff] [blame] | 91 | pca9698_set_bit(gpio, data, 1); |
| 92 | |
| 93 | return pca9698_write40(addr, PCA9698_REG_CONFIG, data); |
Dirk Eibach | c3213b8 | 2011-10-03 23:13:51 +0000 | [diff] [blame] | 94 | } |
| 95 | |
Dirk Eibach | bae3a22 | 2011-10-31 09:39:12 +0100 | [diff] [blame] | 96 | int pca9698_direction_output(u8 addr, unsigned gpio, int value) |
Dirk Eibach | c3213b8 | 2011-10-03 23:13:51 +0000 | [diff] [blame] | 97 | { |
| 98 | u8 data[PCA9698_BUFFER_SIZE]; |
| 99 | int res; |
| 100 | |
Dirk Eibach | bae3a22 | 2011-10-31 09:39:12 +0100 | [diff] [blame] | 101 | res = pca9698_set_value(addr, gpio, value); |
| 102 | if (res) |
| 103 | return res; |
| 104 | |
| 105 | res = pca9698_read40(addr, PCA9698_REG_CONFIG, data); |
Dirk Eibach | c3213b8 | 2011-10-03 23:13:51 +0000 | [diff] [blame] | 106 | if (res) |
| 107 | return res; |
| 108 | |
Dirk Eibach | bae3a22 | 2011-10-31 09:39:12 +0100 | [diff] [blame] | 109 | pca9698_set_bit(gpio, data, 0); |
| 110 | |
| 111 | return pca9698_write40(addr, PCA9698_REG_CONFIG, data); |
Dirk Eibach | c3213b8 | 2011-10-03 23:13:51 +0000 | [diff] [blame] | 112 | } |
| 113 | |
Dirk Eibach | bae3a22 | 2011-10-31 09:39:12 +0100 | [diff] [blame] | 114 | int pca9698_get_value(u8 addr, unsigned gpio) |
Dirk Eibach | c3213b8 | 2011-10-03 23:13:51 +0000 | [diff] [blame] | 115 | { |
Dirk Eibach | bae3a22 | 2011-10-31 09:39:12 +0100 | [diff] [blame] | 116 | unsigned config_byte = gpio / 8; |
| 117 | unsigned config_bit = gpio % 8; |
Dirk Eibach | c3213b8 | 2011-10-03 23:13:51 +0000 | [diff] [blame] | 118 | unsigned value; |
| 119 | u8 data[PCA9698_BUFFER_SIZE]; |
| 120 | int res; |
| 121 | |
Dirk Eibach | bae3a22 | 2011-10-31 09:39:12 +0100 | [diff] [blame] | 122 | res = pca9698_read40(addr, PCA9698_REG_INPUT, data); |
Dirk Eibach | c3213b8 | 2011-10-03 23:13:51 +0000 | [diff] [blame] | 123 | if (res) |
| 124 | return -1; |
| 125 | |
| 126 | value = data[config_byte] & (1 << config_bit); |
| 127 | |
| 128 | return !!value; |
| 129 | } |
| 130 | |
Dirk Eibach | bae3a22 | 2011-10-31 09:39:12 +0100 | [diff] [blame] | 131 | int pca9698_set_value(u8 addr, unsigned gpio, int value) |
Dirk Eibach | c3213b8 | 2011-10-03 23:13:51 +0000 | [diff] [blame] | 132 | { |
| 133 | u8 data[PCA9698_BUFFER_SIZE]; |
| 134 | int res; |
| 135 | |
Dirk Eibach | bae3a22 | 2011-10-31 09:39:12 +0100 | [diff] [blame] | 136 | res = pca9698_read40(addr, PCA9698_REG_OUTPUT, data); |
Dirk Eibach | c3213b8 | 2011-10-03 23:13:51 +0000 | [diff] [blame] | 137 | if (res) |
| 138 | return res; |
| 139 | |
Dirk Eibach | bae3a22 | 2011-10-31 09:39:12 +0100 | [diff] [blame] | 140 | pca9698_set_bit(gpio, data, value); |
| 141 | |
| 142 | return pca9698_write40(addr, PCA9698_REG_OUTPUT, data); |
Dirk Eibach | c3213b8 | 2011-10-03 23:13:51 +0000 | [diff] [blame] | 143 | } |