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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2001
3 * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
4 * Based on code by:
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <common.h>
Stefan Roese247e9d72010-09-09 19:18:00 +020027#include <asm/ppc4xx.h>
wdenkc6097192002-11-03 00:24:07 +000028#include <asm/processor.h>
29
30#include <watchdog.h>
31
Wolfgang Denkce3c2182011-12-07 12:19:25 +000032/* info for FLASH chips */
33flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
wdenkc6097192002-11-03 00:24:07 +000034
Wolfgang Denkce3c2182011-12-07 12:19:25 +000035/*
wdenkc6097192002-11-03 00:24:07 +000036 * Functions
37 */
Wolfgang Denkce3c2182011-12-07 12:19:25 +000038static ulong flash_get_size(vu_long *addr, flash_info_t *info);
wdenkc6097192002-11-03 00:24:07 +000039static int write_word8(flash_info_t *info, ulong dest, ulong data);
Wolfgang Denkce3c2182011-12-07 12:19:25 +000040static int write_word32(flash_info_t *info, ulong dest, ulong data);
41static void flash_get_offsets(ulong base, flash_info_t *info);
wdenkc6097192002-11-03 00:24:07 +000042
Wolfgang Denkce3c2182011-12-07 12:19:25 +000043unsigned long flash_init(void)
wdenkc6097192002-11-03 00:24:07 +000044{
Wolfgang Denkce3c2182011-12-07 12:19:25 +000045 int i;
46 unsigned long size_b0, base_b0;
Wolfgang Denkfe57a282011-12-07 12:19:26 +000047 unsigned long size_b1;
wdenkc6097192002-11-03 00:24:07 +000048
Wolfgang Denkce3c2182011-12-07 12:19:25 +000049 /* Init: no FLASHes known */
50 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i)
51 flash_info[i].flash_id = FLASH_UNKNOWN;
wdenkc6097192002-11-03 00:24:07 +000052
Wolfgang Denkce3c2182011-12-07 12:19:25 +000053 /* Get Size of Boot and Main Flashes */
54 size_b0 = flash_get_size((vu_long *) FLASH_BASE0_PRELIM,
55 &flash_info[0]);
56 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
57 printf("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
58 size_b0, size_b0 << 20);
59 return 0;
60 }
61 size_b1 =
62 flash_get_size((vu_long *) FLASH_BASE1_PRELIM,
63 &flash_info[1]);
64 if (flash_info[1].flash_id == FLASH_UNKNOWN) {
65 printf("## Unknown FLASH on Bank 1 - Size = 0x%08lx = %ld MB\n",
66 size_b1, size_b1 << 20);
67 return 0;
68 }
wdenkc6097192002-11-03 00:24:07 +000069
Wolfgang Denkce3c2182011-12-07 12:19:25 +000070 /* Calculate base addresses */
71 base_b0 = -size_b0;
wdenkc6097192002-11-03 00:24:07 +000072
Wolfgang Denkce3c2182011-12-07 12:19:25 +000073 /* Setup offsets for Boot Flash */
74 flash_get_offsets(base_b0, &flash_info[0]);
wdenkc6097192002-11-03 00:24:07 +000075
Wolfgang Denkce3c2182011-12-07 12:19:25 +000076 /* Protect board level data */
77 (void) flash_protect(FLAG_PROTECT_SET,
78 base_b0,
79 flash_info[0].start[1] - 1, &flash_info[0]);
wdenkc6097192002-11-03 00:24:07 +000080
Wolfgang Denkce3c2182011-12-07 12:19:25 +000081 /* Monitor protection ON by default */
82 (void) flash_protect(FLAG_PROTECT_SET,
83 base_b0 + size_b0 - monitor_flash_len,
84 base_b0 + size_b0 - 1, &flash_info[0]);
wdenkc6097192002-11-03 00:24:07 +000085
Wolfgang Denkce3c2182011-12-07 12:19:25 +000086 /* Protect the FPGA image */
87 (void) flash_protect(FLAG_PROTECT_SET,
88 FLASH_BASE1_PRELIM,
89 FLASH_BASE1_PRELIM + CONFIG_SYS_FPGA_IMAGE_LEN -
90 1, &flash_info[1]);
wdenkc6097192002-11-03 00:24:07 +000091
Wolfgang Denkce3c2182011-12-07 12:19:25 +000092 /* Protect the default boot image */
93 (void) flash_protect(FLAG_PROTECT_SET,
94 FLASH_BASE1_PRELIM + CONFIG_SYS_FPGA_IMAGE_LEN,
95 FLASH_BASE1_PRELIM + CONFIG_SYS_FPGA_IMAGE_LEN +
96 0x600000 - 1, &flash_info[1]);
wdenkc6097192002-11-03 00:24:07 +000097
Wolfgang Denkce3c2182011-12-07 12:19:25 +000098 /* Setup offsets for Main Flash */
99 flash_get_offsets(FLASH_BASE1_PRELIM, &flash_info[1]);
wdenkc6097192002-11-03 00:24:07 +0000100
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000101 return size_b0 + size_b1;
102}
wdenkc6097192002-11-03 00:24:07 +0000103
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000104static void flash_get_offsets(ulong base, flash_info_t *info)
wdenkc6097192002-11-03 00:24:07 +0000105{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000106 int i;
wdenkc6097192002-11-03 00:24:07 +0000107
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000108 /* set up sector start address table - FOR BOOT ROM ONLY!!! */
109 if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) {
110 for (i = 0; i < info->sector_count; i++)
111 info->start[i] = base + (i * 0x00010000);
112 }
113} /* end flash_get_offsets() */
wdenkc6097192002-11-03 00:24:07 +0000114
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000115void flash_print_info(flash_info_t *info)
wdenkc6097192002-11-03 00:24:07 +0000116{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000117 int i;
118 int k;
119 int size;
120 int erased;
121 volatile unsigned long *flash;
wdenkc6097192002-11-03 00:24:07 +0000122
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000123 if (info->flash_id == FLASH_UNKNOWN) {
124 printf("missing or unknown FLASH type\n");
125 return;
126 }
wdenkc6097192002-11-03 00:24:07 +0000127
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000128 switch (info->flash_id & FLASH_VENDMASK) {
129 case FLASH_MAN_AMD:
130 printf("1 x AMD ");
131 break;
132 case FLASH_MAN_STM:
133 printf("1 x STM ");
134 break;
135 case FLASH_MAN_INTEL:
136 printf("2 x Intel ");
137 break;
138 default:
139 printf("Unknown Vendor ");
140 }
wdenkc6097192002-11-03 00:24:07 +0000141
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000142 switch (info->flash_id & FLASH_TYPEMASK) {
wdenk57b2d802003-06-27 21:31:46 +0000143 case FLASH_AM040:
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000144 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
145 printf("AM29LV040 (4096 Kbit, uniform sector size)\n");
146 else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_STM)
147 printf("M29W040B (4096 Kbit, uniform block size)\n");
148 else
149 printf("UNKNOWN 29x040x (4096 Kbit, uniform sector size)\n");
150 break;
wdenk57b2d802003-06-27 21:31:46 +0000151 case FLASH_28F320J3A:
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000152 printf("28F320J3A (32 Mbit = 128K x 32)\n");
153 break;
wdenk57b2d802003-06-27 21:31:46 +0000154 case FLASH_28F640J3A:
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000155 printf("28F640J3A (64 Mbit = 128K x 64)\n");
156 break;
wdenk57b2d802003-06-27 21:31:46 +0000157 case FLASH_28F128J3A:
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000158 printf("28F128J3A (128 Mbit = 128K x 128)\n");
159 break;
wdenk57b2d802003-06-27 21:31:46 +0000160 default:
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000161 printf("Unknown Chip Type\n");
162 }
wdenkc6097192002-11-03 00:24:07 +0000163
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000164 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_STM) {
165 printf(" Size: %ld KB in %d Blocks\n",
166 info->size >> 10, info->sector_count);
167 } else {
168 printf(" Size: %ld KB in %d Sectors\n",
169 info->size >> 10, info->sector_count);
wdenk57b2d802003-06-27 21:31:46 +0000170 }
wdenkc6097192002-11-03 00:24:07 +0000171
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000172 printf(" Sector Start Addresses:");
173 for (i = 0; i < info->sector_count; ++i) {
174 /*
175 * Check if whole sector is erased
176 */
177 if (i != (info->sector_count - 1))
178 size = info->start[i + 1] - info->start[i];
179 else
180 size = info->start[0] + info->size - info->start[i];
181 erased = 1;
182 flash = (volatile unsigned long *) info->start[i];
183 size = size >> 2; /* divide by 4 for longword access */
184 for (k = 0; k < size; k++) {
185 if (*flash++ != 0xffffffff) {
186 erased = 0;
187 break;
188 }
189 }
190
191 if ((i % 5) == 0)
192 printf("\n ");
193 printf(" %08lX%s%s",
194 info->start[i],
195 erased ? " E" : " ",
196 info->protect[i] ? "RO " : " ");
197 }
198 printf("\n");
199} /* end flash_print_info() */
wdenkc6097192002-11-03 00:24:07 +0000200
201/*
202 * The following code cannot be run from FLASH!
203 */
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000204static ulong flash_get_size(vu_long *addr, flash_info_t *info)
wdenkc6097192002-11-03 00:24:07 +0000205{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000206 short i;
207 ulong base = (ulong) addr;
wdenkc6097192002-11-03 00:24:07 +0000208
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000209 /* Setup default type */
210 info->flash_id = FLASH_UNKNOWN;
211 info->sector_count = 0;
212 info->size = 0;
wdenkc6097192002-11-03 00:24:07 +0000213
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000214 /* Test for Boot Flash */
215 if (base == FLASH_BASE0_PRELIM) {
216 unsigned char value;
217 volatile unsigned char *addr2 = (unsigned char *) addr;
wdenkc6097192002-11-03 00:24:07 +0000218
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000219 /* Write auto select command: read Manufacturer ID */
220 *(addr2 + 0x555) = 0xaa;
221 *(addr2 + 0x2aa) = 0x55;
222 *(addr2 + 0x555) = 0x90;
wdenkc6097192002-11-03 00:24:07 +0000223
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000224 /* Manufacture ID */
225 value = *addr2;
226 switch (value) {
227 case (unsigned char) AMD_MANUFACT:
228 info->flash_id = FLASH_MAN_AMD;
229 break;
230 case (unsigned char) STM_MANUFACT:
231 info->flash_id = FLASH_MAN_STM;
232 break;
233 default:
234 *addr2 = 0xf0; /* no or unknown flash */
235 return 0;
236 }
wdenkc6097192002-11-03 00:24:07 +0000237
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000238 /* Device ID */
239 value = *(addr2 + 1);
240 switch (value) {
241 case (unsigned char) AMD_ID_LV040B:
242 case (unsigned char) STM_ID_29W040B:
243 info->flash_id += FLASH_AM040;
244 info->sector_count = 8;
245 info->size = 0x00080000;
246 break; /* => 512Kb */
247 default:
248 *addr2 = 0xf0; /* => no or unknown flash */
249 return 0;
250 }
251 } else { /* MAIN Flash */
252 unsigned long value;
253 volatile unsigned long *addr2 = (unsigned long *) addr;
wdenkc6097192002-11-03 00:24:07 +0000254
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000255 /* Write auto select command: read Manufacturer ID */
256 *addr2 = 0x90909090;
wdenkc6097192002-11-03 00:24:07 +0000257
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000258 /* Manufacture ID */
259 value = *addr2;
260 switch (value) {
261 case (unsigned long) INTEL_MANUFACT:
262 info->flash_id = FLASH_MAN_INTEL;
263 break;
264 default:
265 *addr2 = 0xff; /* no or unknown flash */
266 return 0;
267 }
wdenkc6097192002-11-03 00:24:07 +0000268
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000269 /* Device ID - This shit is interleaved... */
270 value = *(addr2 + 1);
271 switch (value) {
272 case (unsigned long) INTEL_ID_28F320J3A:
273 info->flash_id += FLASH_28F320J3A;
274 info->sector_count = 32;
275 info->size = 0x00400000 * 2;
276 break; /* => 2 X 4 MB */
277 case (unsigned long) INTEL_ID_28F640J3A:
278 info->flash_id += FLASH_28F640J3A;
279 info->sector_count = 64;
280 info->size = 0x00800000 * 2;
281 break; /* => 2 X 8 MB */
282 case (unsigned long) INTEL_ID_28F128J3A:
283 info->flash_id += FLASH_28F128J3A;
284 info->sector_count = 128;
285 info->size = 0x01000000 * 2;
286 break; /* => 2 X 16 MB */
287 default:
288 *addr2 = 0xff; /* => no or unknown flash */
289 }
wdenk57b2d802003-06-27 21:31:46 +0000290 }
wdenkc6097192002-11-03 00:24:07 +0000291
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000292 /* Make sure we don't exceed CONFIG_SYS_MAX_FLASH_SECT */
293 if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
294 printf("** ERROR: sector count %d > max (%d) **\n",
295 info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
296 info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
297 }
wdenkc6097192002-11-03 00:24:07 +0000298
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000299 /* set up sector start address table */
300 switch (info->flash_id & FLASH_TYPEMASK) {
wdenk57b2d802003-06-27 21:31:46 +0000301 case FLASH_AM040:
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000302 for (i = 0; i < info->sector_count; i++)
303 info->start[i] = base + (i * 0x00010000);
304 break;
wdenk57b2d802003-06-27 21:31:46 +0000305 case FLASH_28F320J3A:
306 case FLASH_28F640J3A:
307 case FLASH_28F128J3A:
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000308 for (i = 0; i < info->sector_count; i++)
309 info->start[i] = base +
310 (i * 0x00020000 * 2); /* 2 Banks */
311 break;
wdenk57b2d802003-06-27 21:31:46 +0000312 }
wdenkc6097192002-11-03 00:24:07 +0000313
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000314 /* Test for Boot Flash */
315 if (base == FLASH_BASE0_PRELIM) {
316 volatile unsigned char *addr2;
wdenkc6097192002-11-03 00:24:07 +0000317
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000318 /* check for protected sectors */
319 for (i = 0; i < info->sector_count; i++) {
320 /*
321 * read sector protection at sector address,
322 * (AX .. A0) = 0x02
323 * D0 = 1 if protected
324 */
325 addr2 = (volatile unsigned char *) (info->start[i]);
326 info->protect[i] = *(addr2 + 2) & 1;
327 }
wdenkc6097192002-11-03 00:24:07 +0000328
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000329 /* Restore read mode */
330 *(unsigned char *) base = 0xF0; /* Reset NORMAL Flash */
331 } else { /* Main Flash */
332 volatile unsigned long *addr2;
wdenkc6097192002-11-03 00:24:07 +0000333
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000334 /* check for protected sectors */
335 for (i = 0; i < info->sector_count; i++) {
336 /*
337 * read sector protection at sector address,
338 * (AX .. A0) = 0x02
339 * D0 = 1 if protected
340 */
341 addr2 = (volatile unsigned long *) (info->start[i]);
342 info->protect[i] = *(addr2 + 2) & 0x1;
343 }
344
345 /* Restore read mode */
346 *(unsigned long *) base = 0xFFFFFFFF; /* Reset Flash */
347 }
348
349 return info->size;
350} /* end flash_get_size() */
wdenkc6097192002-11-03 00:24:07 +0000351
352static int wait_for_DQ7(ulong addr, uchar cmp_val, ulong tout)
353{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000354 int i;
wdenkc6097192002-11-03 00:24:07 +0000355
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000356 volatile uchar *vaddr = (uchar *) addr;
wdenkc6097192002-11-03 00:24:07 +0000357
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000358 /* Loop X times */
359 for (i = 1; i <= (100 * tout); i++) { /* Wait up to tout ms */
360 udelay(10);
361 /* Pause 10 us */
wdenkc6097192002-11-03 00:24:07 +0000362
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000363 /* Check for completion */
364 if ((vaddr[0] & 0x80) == (cmp_val & 0x80))
365 return 0;
wdenkc6097192002-11-03 00:24:07 +0000366
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000367 /* KEEP THE LUSER HAPPY - Print a dot every 1.1 seconds */
368 if (!(i % 110000))
369 putc('.');
wdenkc6097192002-11-03 00:24:07 +0000370
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000371 /* Kick the dog if needed */
372 WATCHDOG_RESET();
373 }
wdenkc6097192002-11-03 00:24:07 +0000374
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000375 return 1;
376} /* wait_for_DQ7() */
wdenkc6097192002-11-03 00:24:07 +0000377
378static int flash_erase8(flash_info_t *info, int s_first, int s_last)
379{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000380 int tcode, rcode = 0;
381 volatile uchar *addr = (uchar *) (info->start[0]);
382 volatile uchar *sector_addr;
383 int flag, prot, sect;
wdenkc6097192002-11-03 00:24:07 +0000384
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000385 /* Validate arguments */
386 if ((s_first < 0) || (s_first > s_last)) {
387 if (info->flash_id == FLASH_UNKNOWN)
388 printf("- missing\n");
389 else
390 printf("- no sectors to erase\n");
391 return 1;
392 }
wdenkc6097192002-11-03 00:24:07 +0000393
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000394 /* Check for KNOWN flash type */
395 if (info->flash_id == FLASH_UNKNOWN) {
396 printf("Can't erase unknown flash type - aborted\n");
397 return 1;
398 }
wdenkc6097192002-11-03 00:24:07 +0000399
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000400 /* Check for protected sectors */
401 prot = 0;
402 for (sect = s_first; sect <= s_last; ++sect) {
403 if (info->protect[sect])
404 prot++;
405 }
406 if (prot) {
407 printf("- Warning: %d protected sectors will not be erased!\n",
408 prot);
409 } else {
410 printf("\n");
411 }
wdenkc6097192002-11-03 00:24:07 +0000412
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000413 /* Start erase on unprotected sectors */
414 for (sect = s_first; sect <= s_last; sect++) {
415 if (info->protect[sect] == 0) { /* not protected */
416 sector_addr = (uchar *) (info->start[sect]);
wdenkc6097192002-11-03 00:24:07 +0000417
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000418 if ((info->flash_id & FLASH_VENDMASK) ==
419 FLASH_MAN_STM)
420 printf("Erasing block %p\n", sector_addr);
421 else
422 printf("Erasing sector %p\n", sector_addr);
wdenkc6097192002-11-03 00:24:07 +0000423
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000424 /* Disable interrupts which might cause timeout */
425 flag = disable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000426
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000427 *(addr + 0x555) = (uchar) 0xAA;
428 *(addr + 0x2aa) = (uchar) 0x55;
429 *(addr + 0x555) = (uchar) 0x80;
430 *(addr + 0x555) = (uchar) 0xAA;
431 *(addr + 0x2aa) = (uchar) 0x55;
432 *sector_addr = (uchar) 0x30; /* sector erase */
wdenkc6097192002-11-03 00:24:07 +0000433
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000434 /*
435 * Wait for each sector to complete, it's more
436 * reliable. According to AMD Spec, you must
437 * issue all erase commands within a specified
438 * timeout. This has been seen to fail, especially
439 * if printf()s are included (for debug)!!
440 * Takes up to 6 seconds.
441 */
442 tcode = wait_for_DQ7((ulong) sector_addr, 0x80, 6000);
wdenkc6097192002-11-03 00:24:07 +0000443
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000444 /* re-enable interrupts if necessary */
445 if (flag)
446 enable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000447
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000448 /* Make sure we didn't timeout */
449 if (tcode) {
450 printf("Timeout\n");
451 rcode = 1;
452 }
453 }
wdenk57b2d802003-06-27 21:31:46 +0000454 }
wdenkc6097192002-11-03 00:24:07 +0000455
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000456 /* wait at least 80us - let's wait 1 ms */
457 udelay(1000);
wdenkc6097192002-11-03 00:24:07 +0000458
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000459 /* reset to read mode */
460 addr = (uchar *) info->start[0];
461 *addr = (uchar) 0xF0; /* reset bank */
wdenkc6097192002-11-03 00:24:07 +0000462
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000463 printf(" done\n");
464 return rcode;
465} /* end flash_erase8() */
wdenkc6097192002-11-03 00:24:07 +0000466
467static int flash_erase32(flash_info_t *info, int s_first, int s_last)
468{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000469 int flag, sect;
470 ulong start, now, last;
471 int prot = 0;
wdenkc6097192002-11-03 00:24:07 +0000472
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000473 /* Validate arguments */
474 if ((s_first < 0) || (s_first > s_last)) {
475 if (info->flash_id == FLASH_UNKNOWN)
476 printf("- missing\n");
477 else
478 printf("- no sectors to erase\n");
479 return 1;
480 }
wdenkc6097192002-11-03 00:24:07 +0000481
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000482 /* Check for KNOWN flash type */
483 if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
484 printf("Can erase only Intel flash types - aborted\n");
485 return 1;
486 }
wdenkc6097192002-11-03 00:24:07 +0000487
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000488 /* Check for protected sectors */
489 for (sect = s_first; sect <= s_last; ++sect) {
490 if (info->protect[sect])
491 prot++;
492 }
493 if (prot) {
494 printf("- Warning: %d protected sectors will not be erased!\n",
495 prot);
496 } else {
497 printf("\n");
498 }
wdenkc6097192002-11-03 00:24:07 +0000499
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000500 start = get_timer(0);
501 last = start;
502 /* Start erase on unprotected sectors */
503 for (sect = s_first; sect <= s_last; sect++) {
504 WATCHDOG_RESET();
505 if (info->protect[sect] == 0) { /* not protected */
506 vu_long *addr = (vu_long *) (info->start[sect]);
507 unsigned long status;
wdenkc6097192002-11-03 00:24:07 +0000508
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000509 /* Disable interrupts which might cause a timeout */
510 flag = disable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000511
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000512 *addr = 0x00500050; /* clear status register */
513 *addr = 0x00200020; /* erase setup */
514 *addr = 0x00D000D0; /* erase confirm */
wdenkc6097192002-11-03 00:24:07 +0000515
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000516 /* re-enable interrupts if necessary */
517 if (flag)
518 enable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000519
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000520 /* Wait at least 80us - let's wait 1 ms */
521 udelay(1000);
wdenkc6097192002-11-03 00:24:07 +0000522
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000523 while (((status = *addr) & 0x00800080) != 0x00800080) {
524 now = get_timer(start);
525 if (now > CONFIG_SYS_FLASH_ERASE_TOUT) {
526 printf("Timeout\n");
527 /* suspend erase */
528 *addr = 0x00B000B0;
529 /* reset to read mode */
530 *addr = 0x00FF00FF;
531 return 1;
532 }
wdenkc6097192002-11-03 00:24:07 +0000533
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000534 /*
535 * show that we're waiting
536 * every second (?)
537 */
538 if ((now - last) > 990) {
539 putc('.');
540 last = now;
541 }
542 }
543 *addr = 0x00FF00FF; /* reset to read mode */
wdenk57b2d802003-06-27 21:31:46 +0000544 }
wdenk57b2d802003-06-27 21:31:46 +0000545 }
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000546 printf(" done\n");
547 return 0;
548}
wdenkc6097192002-11-03 00:24:07 +0000549
550int flash_erase(flash_info_t *info, int s_first, int s_last)
551{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000552 if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040)
553 return flash_erase8(info, s_first, s_last);
554 else
555 return flash_erase32(info, s_first, s_last);
556}
wdenkc6097192002-11-03 00:24:07 +0000557
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000558/*
wdenkc6097192002-11-03 00:24:07 +0000559 * Copy memory to flash, returns:
560 * 0 - OK
561 * 1 - write timeout
562 * 2 - Flash not erased
563 */
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000564static int write_buff8(flash_info_t *info, uchar *src, ulong addr,
565 ulong cnt)
wdenkc6097192002-11-03 00:24:07 +0000566{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000567 ulong cp, wp, data;
568 ulong start;
569 int i, l, rc;
wdenkc6097192002-11-03 00:24:07 +0000570
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000571 start = get_timer(0);
wdenkc6097192002-11-03 00:24:07 +0000572
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000573 wp = (addr & ~3); /* get lower word
574 aligned address */
wdenkc6097192002-11-03 00:24:07 +0000575
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000576 /*
577 * handle unaligned start bytes
578 */
579 l = addr - wp;
580 if (l != 0) {
581 data = 0;
582 for (i = 0, cp = wp; i < l; ++i, ++cp)
583 data = (data << 8) | (*(uchar *) cp);
584
585 for (; i < 4 && cnt > 0; ++i) {
586 data = (data << 8) | *src++;
587 --cnt;
588 ++cp;
589 }
590
591 for (; cnt == 0 && i < 4; ++i, ++cp)
592 data = (data << 8) | (*(uchar *) cp);
593
594 rc = write_word8(info, wp, data);
595 if (rc != 0)
596 return rc;
597
598 wp += 4;
wdenk57b2d802003-06-27 21:31:46 +0000599 }
wdenkc6097192002-11-03 00:24:07 +0000600
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000601 /*
602 * handle word aligned part
603 */
604 while (cnt >= 4) {
605 data = 0;
606 for (i = 0; i < 4; ++i)
607 data = (data << 8) | *src++;
608
609 rc = write_word8(info, wp, data);
610 if (rc != 0)
611 return rc;
612
613 wp += 4;
614 cnt -= 4;
615 if (get_timer(start) > 1000) { /* every second */
616 WATCHDOG_RESET();
617 putc('.');
618 start = get_timer(0);
619 }
wdenk57b2d802003-06-27 21:31:46 +0000620 }
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000621
622 if (cnt == 0)
623 return 0;
wdenkc6097192002-11-03 00:24:07 +0000624
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000625 /*
626 * handle unaligned tail bytes
627 */
wdenk57b2d802003-06-27 21:31:46 +0000628 data = 0;
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000629 for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
630 data = (data << 8) | *src++;
631 --cnt;
wdenk57b2d802003-06-27 21:31:46 +0000632 }
wdenkc6097192002-11-03 00:24:07 +0000633
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000634 for (; i < 4; ++i, ++cp)
635 data = (data << 8) | (*(uchar *) cp);
wdenkc6097192002-11-03 00:24:07 +0000636
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000637 return write_word8(info, wp, data);
638}
wdenkc6097192002-11-03 00:24:07 +0000639
640#define FLASH_WIDTH 4 /* flash bus width in bytes */
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000641static int write_buff32(flash_info_t *info, uchar *src, ulong addr,
642 ulong cnt)
wdenkc6097192002-11-03 00:24:07 +0000643{
644 ulong cp, wp, data;
645 int i, l, rc;
646 ulong start;
647
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000648 start = get_timer(0);
wdenkc6097192002-11-03 00:24:07 +0000649
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000650 if (info->flash_id == FLASH_UNKNOWN)
wdenkc6097192002-11-03 00:24:07 +0000651 return 4;
wdenkc6097192002-11-03 00:24:07 +0000652
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000653 /* get lower FLASH_WIDTH aligned address */
654 wp = (addr & ~(FLASH_WIDTH - 1));
wdenkc6097192002-11-03 00:24:07 +0000655
656 /*
657 * handle unaligned start bytes
658 */
659 if ((l = addr - wp) != 0) {
660 data = 0;
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000661 for (i = 0, cp = wp; i < l; ++i, ++cp)
662 data = (data << 8) | (*(uchar *) cp);
663
664 for (; i < FLASH_WIDTH && cnt > 0; ++i) {
wdenkc6097192002-11-03 00:24:07 +0000665 data = (data << 8) | *src++;
666 --cnt;
667 ++cp;
668 }
wdenkc6097192002-11-03 00:24:07 +0000669
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000670 for (; cnt == 0 && i < FLASH_WIDTH; ++i, ++cp)
671 data = (data << 8) | (*(uchar *) cp);
672
673 rc = write_word32(info, wp, data);
674 if (rc != 0)
675 return rc;
676
wdenkc6097192002-11-03 00:24:07 +0000677 wp += FLASH_WIDTH;
678 }
679
680 /*
681 * handle FLASH_WIDTH aligned part
682 */
683 while (cnt >= FLASH_WIDTH) {
684 data = 0;
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000685 for (i = 0; i < FLASH_WIDTH; ++i)
wdenkc6097192002-11-03 00:24:07 +0000686 data = (data << 8) | *src++;
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000687
688 rc = write_word32(info, wp, data);
689 if (rc != 0)
690 return rc;
691
692 wp += FLASH_WIDTH;
wdenkc6097192002-11-03 00:24:07 +0000693 cnt -= FLASH_WIDTH;
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000694 if (get_timer(start) > 990) { /* every second */
695 putc('.');
wdenkc6097192002-11-03 00:24:07 +0000696 start = get_timer(0);
697 }
698 }
699
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000700 if (cnt == 0)
701 return 0;
wdenkc6097192002-11-03 00:24:07 +0000702
703 /*
704 * handle unaligned tail bytes
705 */
706 data = 0;
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000707 for (i = 0, cp = wp; i < FLASH_WIDTH && cnt > 0; ++i, ++cp) {
wdenkc6097192002-11-03 00:24:07 +0000708 data = (data << 8) | *src++;
709 --cnt;
710 }
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000711
712 for (; i < FLASH_WIDTH; ++i, ++cp)
713 data = (data << 8) | (*(uchar *) cp);
wdenkc6097192002-11-03 00:24:07 +0000714
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000715 return write_word32(info, wp, data);
716}
wdenkc6097192002-11-03 00:24:07 +0000717
718int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
719{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000720 int retval;
wdenkc6097192002-11-03 00:24:07 +0000721
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000722 if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040)
723 retval = write_buff8(info, src, addr, cnt);
724 else
725 retval = write_buff32(info, src, addr, cnt);
wdenkc6097192002-11-03 00:24:07 +0000726
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000727 return retval;
728}
wdenkc6097192002-11-03 00:24:07 +0000729
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000730/*
wdenkc6097192002-11-03 00:24:07 +0000731 * Write a word to Flash, returns:
732 * 0 - OK
733 * 1 - write timeout
734 * 2 - Flash not erased
735 */
736
737static int write_word8(flash_info_t *info, ulong dest, ulong data)
738{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000739 volatile uchar *addr2 = (uchar *) (info->start[0]);
740 volatile uchar *dest2 = (uchar *) dest;
741 volatile uchar *data2 = (uchar *) &data;
742 int flag;
743 int i, tcode, rcode = 0;
wdenkc6097192002-11-03 00:24:07 +0000744
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000745 /* Check if Flash is (sufficently) erased */
746 if ((*((volatile uchar *)dest) & (uchar)data) != (uchar)data)
747 return 2;
wdenkc6097192002-11-03 00:24:07 +0000748
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000749 for (i = 0; i < (4 / sizeof(uchar)); i++) {
750 /* Disable interrupts which might cause a timeout here */
751 flag = disable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000752
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000753 *(addr2 + 0x555) = (uchar) 0xAA;
754 *(addr2 + 0x2aa) = (uchar) 0x55;
755 *(addr2 + 0x555) = (uchar) 0xA0;
wdenkc6097192002-11-03 00:24:07 +0000756
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000757 dest2[i] = data2[i];
wdenkc6097192002-11-03 00:24:07 +0000758
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000759 /* Wait for write to complete, up to 1ms */
760 tcode = wait_for_DQ7((ulong) &dest2[i], data2[i], 1);
wdenkc6097192002-11-03 00:24:07 +0000761
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000762 /* re-enable interrupts if necessary */
763 if (flag)
764 enable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000765
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000766 /* Make sure we didn't timeout */
767 if (tcode)
768 rcode = 1;
wdenk57b2d802003-06-27 21:31:46 +0000769 }
wdenkc6097192002-11-03 00:24:07 +0000770
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000771 return rcode;
772}
wdenkc6097192002-11-03 00:24:07 +0000773
774static int write_word32(flash_info_t *info, ulong dest, ulong data)
775{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000776 vu_long *addr = (vu_long *) dest;
777 ulong status;
778 ulong start;
779 int flag;
780
781 /* Check if Flash is (sufficiently) erased */
782 if ((*addr & data) != data)
783 return 2;
wdenkc6097192002-11-03 00:24:07 +0000784
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000785 /* Disable interrupts which might cause a timeout here */
786 flag = disable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000787
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000788 *addr = 0x00400040; /* write setup */
789 *addr = data;
wdenkc6097192002-11-03 00:24:07 +0000790
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000791 /* re-enable interrupts if necessary */
792 if (flag)
793 enable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000794
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000795 start = get_timer(0);
wdenkc6097192002-11-03 00:24:07 +0000796
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000797 while (((status = *addr) & 0x00800080) != 0x00800080) {
798 WATCHDOG_RESET();
799 if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
800 *addr = 0x00FF00FF; /* restore read mode */
801 return 1;
802 }
wdenk57b2d802003-06-27 21:31:46 +0000803 }
wdenkc6097192002-11-03 00:24:07 +0000804
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000805 *addr = 0x00FF00FF; /* restore read mode */
wdenkc6097192002-11-03 00:24:07 +0000806
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000807 return 0;
808}
wdenkc6097192002-11-03 00:24:07 +0000809
810static int _flash_protect(flash_info_t *info, long sector)
811{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000812 int i;
813 int flag;
814 ulong status;
815 int rcode = 0;
816 volatile long *addr = (long *)sector;
wdenkc6097192002-11-03 00:24:07 +0000817
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000818 switch (info->flash_id & FLASH_TYPEMASK) {
wdenk57b2d802003-06-27 21:31:46 +0000819 case FLASH_28F320J3A:
820 case FLASH_28F640J3A:
821 case FLASH_28F128J3A:
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000822 /* Disable interrupts which might cause Flash to timeout */
823 flag = disable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000824
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000825 /* Issue command */
826 *addr = 0x00500050L; /* Clear the status register */
827 *addr = 0x00600060L; /* Set lock bit setup */
828 *addr = 0x00010001L; /* Set lock bit confirm */
wdenkc6097192002-11-03 00:24:07 +0000829
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000830 /* Wait for command completion */
831 for (i = 0; i < 10; i++) { /* 75us timeout, wait 100us */
832 udelay(10);
833 if ((*addr & 0x00800080L) == 0x00800080L)
834 break;
835 }
wdenkc6097192002-11-03 00:24:07 +0000836
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000837 /* Not successful? */
838 status = *addr;
839 if (status != 0x00800080L) {
840 printf("Protect %x sector failed: %x\n",
841 (uint) sector, (uint) status);
842 rcode = 1;
843 }
wdenkc6097192002-11-03 00:24:07 +0000844
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000845 /* Restore read mode */
846 *addr = 0x00ff00ffL;
wdenkc6097192002-11-03 00:24:07 +0000847
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000848 /* re-enable interrupts if necessary */
849 if (flag)
850 enable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000851
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000852 break;
853 case FLASH_AM040: /* No soft sector protection */
854 break;
855 }
wdenkc6097192002-11-03 00:24:07 +0000856
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000857 /* Turn protection on for this sector */
858 for (i = 0; i < info->sector_count; i++) {
859 if (info->start[i] == sector) {
860 info->protect[i] = 1;
861 break;
862 }
wdenk57b2d802003-06-27 21:31:46 +0000863 }
wdenkc6097192002-11-03 00:24:07 +0000864
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000865 return rcode;
866}
wdenkc6097192002-11-03 00:24:07 +0000867
868static int _flash_unprotect(flash_info_t *info, long sector)
869{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000870 int i;
871 int flag;
872 ulong status;
873 int rcode = 0;
874 volatile long *addr = (long *) sector;
wdenkc6097192002-11-03 00:24:07 +0000875
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000876 switch (info->flash_id & FLASH_TYPEMASK) {
wdenk57b2d802003-06-27 21:31:46 +0000877 case FLASH_28F320J3A:
878 case FLASH_28F640J3A:
879 case FLASH_28F128J3A:
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000880 /* Disable interrupts which might cause Flash to timeout */
881 flag = disable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000882
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000883 *addr = 0x00500050L; /* Clear the status register */
884 *addr = 0x00600060L; /* Clear lock bit setup */
885 *addr = 0x00D000D0L; /* Clear lock bit confirm */
wdenkc6097192002-11-03 00:24:07 +0000886
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000887 /* Wait for command completion */
888 for (i = 0; i < 80; i++) { /* 700ms timeout, wait 800 */
889 udelay(10000); /* Delay 10ms */
890 if ((*addr & 0x00800080L) == 0x00800080L)
891 break;
892 }
wdenkc6097192002-11-03 00:24:07 +0000893
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000894 /* Not successful? */
895 status = *addr;
896 if (status != 0x00800080L) {
897 printf("Un-protect %x sector failed: %x\n",
898 (uint) sector, (uint) status);
899 *addr = 0x00ff00ffL;
900 rcode = 1;
901 }
wdenkc6097192002-11-03 00:24:07 +0000902
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000903 /* restore read mode */
904 *addr = 0x00ff00ffL;
wdenkc6097192002-11-03 00:24:07 +0000905
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000906 /* re-enable interrupts if necessary */
907 if (flag)
908 enable_interrupts();
wdenkc6097192002-11-03 00:24:07 +0000909
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000910 break;
911 case FLASH_AM040: /* No soft sector protection */
912 break;
wdenk57b2d802003-06-27 21:31:46 +0000913 }
wdenkc6097192002-11-03 00:24:07 +0000914
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000915 /*
916 * Fix Intel's little red wagon. Reprotect
917 * sectors that were protected before we undid
918 * protection on a specific sector.
919 */
920 for (i = 0; i < info->sector_count; i++) {
921 if (info->start[i] != sector) {
922 if (info->protect[i]) {
923 if (_flash_protect(info, info->start[i]))
924 rcode = 1;
925 }
926 } else /* Turn protection off for this sector */
927 info->protect[i] = 0;
928 }
wdenkc6097192002-11-03 00:24:07 +0000929
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000930 return rcode;
931}
wdenkc6097192002-11-03 00:24:07 +0000932
933int flash_real_protect(flash_info_t *info, long sector, int prot)
934{
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000935 int rcode;
wdenkc6097192002-11-03 00:24:07 +0000936
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000937 if (prot)
938 rcode = _flash_protect(info, info->start[sector]);
939 else
940 rcode = _flash_unprotect(info, info->start[sector]);
wdenkc6097192002-11-03 00:24:07 +0000941
Wolfgang Denkce3c2182011-12-07 12:19:25 +0000942 return rcode;
943}