Rob Herring | 73089ad | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2010-2011 Calxeda, Inc. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify it |
| 5 | * under the terms of the GNU General Public License as published by the Free |
| 6 | * Software Foundation; either version 2 of the License, or (at your option) |
| 7 | * any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along with |
| 15 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 16 | */ |
| 17 | |
| 18 | #include <common.h> |
| 19 | #include <ahci.h> |
| 20 | #include <scsi.h> |
| 21 | |
| 22 | #include <asm/sizes.h> |
| 23 | |
| 24 | DECLARE_GLOBAL_DATA_PTR; |
| 25 | |
| 26 | /* |
| 27 | * Miscellaneous platform dependent initialisations |
| 28 | */ |
| 29 | int board_init(void) |
| 30 | { |
| 31 | icache_enable(); |
| 32 | |
| 33 | return 0; |
| 34 | } |
| 35 | |
Rob Herring | 6fd0942 | 2011-12-15 11:15:50 +0000 | [diff] [blame] | 36 | /* We know all the init functions have been run now */ |
| 37 | int board_eth_init(bd_t *bis) |
| 38 | { |
| 39 | int rc = 0; |
| 40 | |
| 41 | #ifdef CONFIG_CALXEDA_XGMAC |
| 42 | rc += calxedaxgmac_initialize(0, 0xfff50000); |
| 43 | rc += calxedaxgmac_initialize(1, 0xfff51000); |
| 44 | #endif |
| 45 | return rc; |
| 46 | } |
| 47 | |
Rob Herring | 73089ad | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 48 | int misc_init_r(void) |
| 49 | { |
| 50 | ahci_init(0xffe08000); |
| 51 | scsi_scan(1); |
| 52 | return 0; |
| 53 | } |
| 54 | |
| 55 | int dram_init(void) |
| 56 | { |
| 57 | gd->ram_size = SZ_512M; |
| 58 | return 0; |
| 59 | } |
| 60 | |
| 61 | void dram_init_banksize(void) |
| 62 | { |
| 63 | gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; |
| 64 | gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; |
| 65 | } |
| 66 | |
| 67 | void reset_cpu(ulong addr) |
| 68 | { |
| 69 | } |