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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
Simon Glass780ba482016-03-11 22:06:58 -07002/*
3 * Copyright (c) 2016 Google, Inc
Simon Glass780ba482016-03-11 22:06:58 -07004 */
5
6#ifndef __ASM_CPU_COMMON_H
7#define __ASM_CPU_COMMON_H
8
9#define IA32_PERF_CTL 0x199
10
Simon Glassaba3c602019-09-25 08:11:35 -060011struct cpu_info;
12
Simon Glass780ba482016-03-11 22:06:58 -070013/**
14 * cpu_common_init() - Set up common CPU init
15 *
16 * This reports BIST failure, enables the LAPIC, updates microcode, enables
17 * the upper 128-bytes of CROM RAM, probes the northbridge, PCH, LPC and SATA.
18 *
19 * @return 0 if OK, -ve on error
20 */
21int cpu_common_init(void);
22
23/**
24 * cpu_set_flex_ratio_to_tdp_nominal() - Set up the maximum non-turbo rate
25 *
26 * If a change is needed, this function will do a soft reset so it takes
27 * effect.
28 *
29 * Some details are available here:
30 * http://forum.hwbot.org/showthread.php?t=76092
31 *
32 * @return 0 if OK, -ve on error
33 */
34int cpu_set_flex_ratio_to_tdp_nominal(void);
35
Simon Glassaba3c602019-09-25 08:11:35 -060036/**
37 * cpu_intel_get_info() - Obtain CPU info for Intel CPUs
38 *
39 * Most Intel CPUs use the same MSR to obtain the clock speed, and use the same
40 * features. This function fills in these values, given the value of the base
41 * clock in MHz (typically this should be set to 100).
42 *
43 * @info: cpu_info struct to fill in
44 * @bclk_mz: the base clock in MHz
45 *
46 * @return 0 always
47 */
48int cpu_intel_get_info(struct cpu_info *info, int bclk_mz);
49
Simon Glass780ba482016-03-11 22:06:58 -070050#endif