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Lokesh Vutla3e716e22013-02-17 23:34:35 +00001/*
2 * (C) Copyright 2013
3 * Texas Instruments Incorporated.
4 * Lokesh Vutla <lokeshvutla@ti.com>
5 *
6 * Configuration settings for the TI DRA7XX board.
7 * See omap5_common.h for omap5 common settings.
8 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02009 * SPDX-License-Identifier: GPL-2.0+
Lokesh Vutla3e716e22013-02-17 23:34:35 +000010 */
11
12#ifndef __CONFIG_DRA7XX_EVM_H
13#define __CONFIG_DRA7XX_EVM_H
14
Tom Rinib3277f52013-08-09 11:22:18 -040015#define CONFIG_DRA7XX
Lokesh Vutla3e716e22013-02-17 23:34:35 +000016
Lokesh Vutlaf8c725e2013-08-23 17:27:04 +053017/* MMC ENV related defines */
18#define CONFIG_ENV_IS_IN_MMC
19#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
20#define CONFIG_ENV_OFFSET 0xE0000
21#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
22#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
23#define CONFIG_CMD_SAVEENV
Lokesh Vutla3e716e22013-02-17 23:34:35 +000024
Minal Shah01ae8ca2013-10-04 14:52:02 -040025#if (CONFIG_CONS_INDEX == 1)
Tom Rinib3277f52013-08-09 11:22:18 -040026#define CONSOLEDEV "ttyO0"
Minal Shah01ae8ca2013-10-04 14:52:02 -040027#elif (CONFIG_CONS_INDEX == 3)
28#define CONSOLEDEV "ttyO2"
29#endif
30#define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */
31#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
32#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
Sricharan R9cc5ba02013-05-30 03:19:33 +000033#define CONFIG_BAUDRATE 115200
Lokesh Vutla16523262013-05-30 03:19:38 +000034
35#define CONFIG_SYS_OMAP_ABE_SYSCK
Dan Murphya6f9d152013-06-11 11:22:30 -050036
Tom Rinib3277f52013-08-09 11:22:18 -040037#include <configs/omap5_common.h>
Dan Murphya6f9d152013-06-11 11:22:30 -050038
Mugunthan V N85ae8be2013-07-08 16:04:43 +053039/* CPSW Ethernet */
Tom Rini243df4a2013-08-20 08:53:54 -040040#define CONFIG_CMD_NET /* 'bootp' and 'tftp' */
Mugunthan V N85ae8be2013-07-08 16:04:43 +053041#define CONFIG_CMD_DHCP
Tom Rini243df4a2013-08-20 08:53:54 -040042#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
Mugunthan V N85ae8be2013-07-08 16:04:43 +053043#define CONFIG_BOOTP_DNS2
44#define CONFIG_BOOTP_SEND_HOSTNAME
45#define CONFIG_BOOTP_GATEWAY
46#define CONFIG_BOOTP_SUBNETMASK
Tom Rini243df4a2013-08-20 08:53:54 -040047#define CONFIG_NET_RETRY_COUNT 10
48#define CONFIG_CMD_PING
49#define CONFIG_CMD_MII
50#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
51#define CONFIG_MII /* Required in net/eth.c */
52#define CONFIG_PHY_GIGE /* per-board part of CPSW */
Mugunthan V N85ae8be2013-07-08 16:04:43 +053053#define CONFIG_PHYLIB
54#define CONFIG_PHY_ADDR 2
55
Matt Porterbb1a8472013-10-07 15:53:03 +053056/* SPI */
57#undef CONFIG_OMAP3_SPI
58#define CONFIG_TI_QSPI
59#define CONFIG_SPI_FLASH
60#define CONFIG_SPI_FLASH_SPANSION
61#define CONFIG_CMD_SF
62#define CONFIG_CMD_SPI
63#define CONFIG_TI_SPI_MMAP
64#define CONFIG_SF_DEFAULT_SPEED 48000000
65#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3
66
67/* SPI SPL */
68#define CONFIG_SPL_SPI_SUPPORT
69#define CONFIG_SPL_SPI_LOAD
70#define CONFIG_SPL_SPI_FLASH_SUPPORT
71#define CONFIG_SPL_SPI_BUS 0
72#define CONFIG_SPL_SPI_CS 0
73#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
74
Dan Murphy69521c12013-10-11 12:28:17 -050075/* USB xHCI HOST */
76#define CONFIG_CMD_USB
77#define CONFIG_USB_HOST
78#define CONFIG_USB_XHCI
79#define CONFIG_USB_XHCI_OMAP
80#define CONFIG_USB_STORAGE
81#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
82
83#define CONFIG_OMAP_USB_PHY
84#define CONFIG_OMAP_USB2PHY2_HOST
85
Roger Quadrosf019ee82013-11-11 16:56:44 +020086/* SATA */
87#define CONFIG_BOARD_LATE_INIT
88#define CONFIG_CMD_SCSI
89#define CONFIG_LIBATA
90#define CONFIG_SCSI_AHCI
91#define CONFIG_SCSI_AHCI_PLAT
92#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
93#define CONFIG_SYS_SCSI_MAX_LUN 1
94#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
95 CONFIG_SYS_SCSI_MAX_LUN)
96
Lokesh Vutla3e716e22013-02-17 23:34:35 +000097#endif /* __CONFIG_DRA7XX_EVM_H */