| Patrick Delaunay | 7858d7e | 2019-02-12 11:44:40 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */ |
| 2 | /* |
| 3 | * Copyright (C) 2019, STMicroelectronics - All Rights Reserved |
| 4 | */ |
| 5 | |
| 6 | #ifndef __STM32MP1_SMC_H__ |
| 7 | #define __STM32MP1_SMC_H__ |
| 8 | |
| 9 | #include <linux/arm-smccc.h> |
| 10 | |
| 11 | /* |
| 12 | * SMC function IDs for STM32 Service queries |
| 13 | * STM32 SMC services use the space between 0x82000000 and 0x8200FFFF |
| 14 | * like this is defined in SMC calling Convention by ARM |
| 15 | * for SiP (silicon Partner) |
| 16 | * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html |
| 17 | */ |
| 18 | #define STM32_SMC_VERSION 0x82000000 |
| 19 | |
| 20 | /* Secure Service access from Non-secure */ |
| 21 | #define STM32_SMC_BSEC 0x82001003 |
| 22 | |
| 23 | /* Service for BSEC */ |
| 24 | #define STM32_SMC_READ_SHADOW 0x01 |
| 25 | #define STM32_SMC_PROG_OTP 0x02 |
| 26 | #define STM32_SMC_WRITE_SHADOW 0x03 |
| 27 | #define STM32_SMC_READ_OTP 0x04 |
| 28 | #define STM32_SMC_READ_ALL 0x05 |
| 29 | #define STM32_SMC_WRITE_ALL 0x06 |
| 30 | |
| 31 | /* SMC error codes */ |
| 32 | #define STM32_SMC_OK 0x0 |
| 33 | #define STM32_SMC_NOT_SUPPORTED -1 |
| 34 | #define STM32_SMC_FAILED -2 |
| 35 | #define STM32_SMC_INVALID_PARAMS -3 |
| 36 | |
| 37 | #define stm32_smc_exec(svc, op, data1, data2) \ |
| 38 | stm32_smc(svc, op, data1, data2, NULL) |
| 39 | |
| 40 | #ifdef CONFIG_ARM_SMCCC |
| 41 | static inline u32 stm32_smc(u32 svc, u8 op, u32 data1, u32 data2, u32 *result) |
| 42 | { |
| 43 | struct arm_smccc_res res; |
| 44 | |
| 45 | arm_smccc_smc(svc, op, data1, data2, 0, 0, 0, 0, &res); |
| 46 | |
| 47 | if (res.a0) { |
| 48 | pr_err("%s: Failed to exec in secure mode (err = %ld)\n", |
| 49 | __func__, res.a0); |
| 50 | return -EINVAL; |
| 51 | } |
| 52 | if (result) |
| 53 | *result = (u32)res.a1; |
| 54 | |
| 55 | return 0; |
| 56 | } |
| 57 | #else |
| 58 | static inline u32 stm32_smc(u32 svc, u8 op, u32 data1, u32 data2, u32 *result) |
| 59 | { |
| 60 | return 0; |
| 61 | } |
| 62 | #endif |
| 63 | |
| 64 | #endif /* __STM32MP1_SMC_H__ */ |