blob: 1ce03473002b83a3ac5db7fcad00a627f15ce452 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Sergey Temerkhanov69f7a032015-10-14 09:55:50 -07002/**
3 * (C) Copyright 2014, Cavium Inc.
Sergey Temerkhanov69f7a032015-10-14 09:55:50 -07004**/
5
6#ifndef __THUNDERX_88XX_H__
7#define __THUNDERX_88XX_H__
8
9#define CONFIG_REMAKE_ELF
10
11#define CONFIG_THUNDERX
12
13#define CONFIG_SYS_64BIT
14
Sergey Temerkhanov69f7a032015-10-14 09:55:50 -070015#define MEM_BASE 0x00500000
16
Sergey Temerkhanov62dce242015-10-14 09:55:51 -070017#define CONFIG_SYS_LOWMEM_BASE MEM_BASE
18
Sergey Temerkhanov69f7a032015-10-14 09:55:50 -070019/* Link Definitions */
Sergey Temerkhanov69f7a032015-10-14 09:55:50 -070020#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
21
Sergey Temerkhanov69f7a032015-10-14 09:55:50 -070022/* SMP Spin Table Definitions */
23#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
24
Sergey Temerkhanov69f7a032015-10-14 09:55:50 -070025/* Generic Timer Definitions */
26#define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
27
Sergey Temerkhanov69f7a032015-10-14 09:55:50 -070028/* PL011 Serial Configuration */
29
Sergey Temerkhanov69f7a032015-10-14 09:55:50 -070030#define CONFIG_PL011_CLOCK 24000000
Sergey Temerkhanov69f7a032015-10-14 09:55:50 -070031
32/* Generic Interrupt Controller Definitions */
33#define GICD_BASE (0x801000000000)
34#define GICR_BASE (0x801000002000)
35#define CONFIG_SYS_SERIAL0 0x87e024000000
36#define CONFIG_SYS_SERIAL1 0x87e025000000
37
Sergey Temerkhanov69f7a032015-10-14 09:55:50 -070038/* BOOTP options */
39#define CONFIG_BOOTP_BOOTFILESIZE
Sergey Temerkhanov69f7a032015-10-14 09:55:50 -070040
41/* Miscellaneous configurable options */
Sergey Temerkhanov69f7a032015-10-14 09:55:50 -070042
43/* Physical Memory Map */
Sergey Temerkhanov69f7a032015-10-14 09:55:50 -070044#define PHYS_SDRAM_1 (MEM_BASE) /* SDRAM Bank #1 */
45#define PHYS_SDRAM_1_SIZE (0x80000000-MEM_BASE) /* 2048 MB */
46#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
47
48/* Initial environment variables */
49#define UBOOT_IMG_HEAD_SIZE 0x40
50/* C80000 - 0x40 */
51#define CONFIG_EXTRA_ENV_SETTINGS \
52 "kernel_addr=08007ffc0\0" \
53 "fdt_addr=0x94C00000\0" \
54 "fdt_high=0x9fffffff\0"
55
Sergey Temerkhanov69f7a032015-10-14 09:55:50 -070056/* Do not preserve environment */
Sergey Temerkhanov69f7a032015-10-14 09:55:50 -070057
58/* Monitor Command Prompt */
59#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Sergey Temerkhanov69f7a032015-10-14 09:55:50 -070060#define CONFIG_SYS_MAXARGS 64 /* max command args */
61#define CONFIG_NO_RELOCATION 1
Sergey Temerkhanov69f7a032015-10-14 09:55:50 -070062#define PLL_REF_CLK 50000000 /* 50 MHz */
63#define NS_PER_REF_CLK_TICK (1000000000/PLL_REF_CLK)
64
65#endif /* __THUNDERX_88XX_H__ */