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git01.mediatek.com / filogic / uboot / 24ef611ad72366c884bd8a4772719654ceab518d / . / configs / ds414_defconfig
blob: d85228490613d4406e429199c15359729e891804 [file] [log] [blame]
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]1CONFIG_ARM=y
Adam Fordd36b1022019-08-14 08:29:25 -0500[diff] [blame]2CONFIG_ARCH_CPU_INIT=y
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]3CONFIG_ARCH_MVEBU=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]4CONFIG_SYS_TEXT_BASE=0x00800000
Simon Glassf2a89462016-09-12 23:18:41 -0600[diff] [blame]5CONFIG_SPL_LIBCOMMON_SUPPORT=y
Simon Glassb16c92c2016-09-12 23:18:43 -0600[diff] [blame]6CONFIG_SPL_LIBGENERIC_SUPPORT=y
Masahiro Yamada75794f92016-09-19 21:40:26 +0900[diff] [blame]7CONFIG_SYS_MALLOC_F_LEN=0x2000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]8CONFIG_NR_DRAM_BANKS=2
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]9CONFIG_TARGET_DS414=y
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]10CONFIG_ENV_SIZE=0x10000
11CONFIG_ENV_OFFSET=0x7E0000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]12CONFIG_ENV_SECT_SIZE=0x10000
13CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]14CONFIG_SPL_TEXT_BASE=0x40004030
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]15CONFIG_SPL_SERIAL_SUPPORT=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]16CONFIG_SPL=y
17CONFIG_DEBUG_UART_BASE=0xd0012000
18CONFIG_DEBUG_UART_CLOCK=250000000
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]19CONFIG_DEFAULT_DEVICE_TREE="armada-xp-synology-ds414"
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]20CONFIG_DEBUG_UART=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]21CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]22CONFIG_USE_BOOTARGS=y
Phil Sutteref534b22021-03-07 22:22:27 +0100[diff] [blame]23CONFIG_BOOTARGS="console=ttyS0,115200 ip=off initrd=0x8000040,8M root=/dev/md0 rw syno_hw_version=DS414r1 ihd_num=4 netif_num=2 flash_size=8 SataLedSpecial=1 HddHotplug=1"
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]24# CONFIG_DISPLAY_BOARDINFO is not set
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]25CONFIG_DISPLAY_BOARDINFO_LATE=y
Phil Suttere91d6882021-03-05 21:05:11 +0100[diff] [blame]26CONFIG_MISC_INIT_R=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]27CONFIG_SPL_I2C_SUPPORT=y
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]28# CONFIG_CMD_FLASH is not set
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]29CONFIG_CMD_I2C=y
30CONFIG_CMD_PCI=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]31CONFIG_CMD_SPI=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]32CONFIG_CMD_USB=y
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]33# CONFIG_CMD_SETEXPR is not set
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]34CONFIG_CMD_DHCP=y
Tom Rinie8f8d672018-04-17 09:22:31 -0400[diff] [blame]35CONFIG_CMD_TFTPPUT=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]36CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]37CONFIG_CMD_PING=y
38CONFIG_CMD_TIME=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]39CONFIG_CMD_EXT2=y
40CONFIG_CMD_FAT=y
Simon Glassc4abb4b2017-05-17 03:25:37 -0600[diff] [blame]41CONFIG_CMD_JFFS2=y
Tom Rini2b62b912018-11-13 19:54:45 -0500[diff] [blame]42CONFIG_CMD_MTDPARTS=y
Heiko Schocher09dbb852016-09-21 07:58:19 +0200[diff] [blame]43CONFIG_CMD_UBI=y
Patrick Delaunay21d3bce2017-01-27 11:00:38 +0100[diff] [blame]44CONFIG_ISO_PARTITION=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]45CONFIG_ENV_OVERWRITE=y
Patrick Delaunayf8e932e2019-02-27 15:20:38 +0100[diff] [blame]46CONFIG_USE_ENV_SPI_MAX_HZ=y
47CONFIG_ENV_SPI_MAX_HZ=50000000
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]48CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]49CONFIG_SPL_OF_TRANSLATE=y
Stefan Roese3af49962019-03-27 14:31:36 +0100[diff] [blame]50CONFIG_BLK=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]51# CONFIG_MMC is not set
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]52CONFIG_MTD=y
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]53CONFIG_SPI_FLASH_STMICRO=y
Joe Hershberger46b7bd12018-03-30 11:52:16 -0500[diff] [blame]54CONFIG_PHY_ADDR_ENABLE=y
Mario Sixf504d1a2018-04-27 14:52:21 +0200[diff] [blame]55CONFIG_PHY_MARVELL=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]56CONFIG_PHY_GIGE=y
Chris Packham919041c2017-08-21 20:17:03 +1200[diff] [blame]57CONFIG_MVNETA=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]58CONFIG_MII=y
Tom Rinif48e0252016-10-26 17:15:37 -0400[diff] [blame]59CONFIG_PCI=y
Stefan Roese3179ec62019-01-25 11:52:43 +0100[diff] [blame]60CONFIG_PCI_MVEBU=y
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]61CONFIG_DEBUG_UART_SHIFT=2
62CONFIG_SYS_NS16550=y
Tuomas Tynkkynen13b5cb82018-02-07 02:42:22 +0200[diff] [blame]63CONFIG_KIRKWOOD_SPI=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]64CONFIG_USB=y
Tom Rini504997e2017-08-25 17:50:26 -0400[diff] [blame]65CONFIG_DM_USB=y
Phil Sutterccd45822021-03-07 22:21:23 +0100[diff] [blame]66CONFIG_USB_XHCI_HCD=y
67# CONFIG_USB_XHCI_MVEBU is not set
68CONFIG_USB_XHCI_PCI=y
Tom Rini7716cd62017-05-12 22:33:28 -0400[diff] [blame]69CONFIG_USB_EHCI_HCD=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]70CONFIG_USB_STORAGE=y