Neil Armstrong | 4c2ea41 | 2017-10-12 15:50:32 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2016 BayLibre, SAS |
| 3 | * Author: Neil Armstrong <narmstrong@baylibre.com> |
| 4 | * |
| 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 6 | */ |
| 7 | |
| 8 | #include <common.h> |
| 9 | #include <dm.h> |
| 10 | #include <asm/io.h> |
| 11 | #include <asm/arch/gxbb.h> |
Neil Armstrong | 24e2ca7 | 2017-10-18 10:02:12 +0200 | [diff] [blame^] | 12 | #include <asm/arch/sm.h> |
| 13 | #include <phy.h> |
| 14 | |
| 15 | #define EFUSE_SN_OFFSET 20 |
| 16 | #define EFUSE_SN_SIZE 16 |
| 17 | #define EFUSE_MAC_OFFSET 52 |
| 18 | #define EFUSE_MAC_SIZE 6 |
Neil Armstrong | 4c2ea41 | 2017-10-12 15:50:32 +0200 | [diff] [blame] | 19 | |
| 20 | int board_init(void) |
| 21 | { |
| 22 | return 0; |
| 23 | } |
| 24 | |
| 25 | int misc_init_r(void) |
| 26 | { |
Neil Armstrong | 24e2ca7 | 2017-10-18 10:02:12 +0200 | [diff] [blame^] | 27 | u8 mac_addr[EFUSE_MAC_SIZE]; |
| 28 | char serial[EFUSE_SN_SIZE]; |
| 29 | ssize_t len; |
| 30 | |
| 31 | /* Set RMII mode */ |
| 32 | out_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_INVERT_RMII_CLK | |
| 33 | GXBB_ETH_REG_0_CLK_EN); |
| 34 | |
| 35 | /* Use Internal PHY */ |
| 36 | out_le32(GXBB_ETH_REG_2, 0x10110181); |
| 37 | out_le32(GXBB_ETH_REG_3, 0xe40908ff); |
| 38 | |
| 39 | /* Enable power and clock gate */ |
| 40 | setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH); |
| 41 | clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK); |
| 42 | |
| 43 | if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { |
| 44 | len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, |
| 45 | mac_addr, EFUSE_MAC_SIZE); |
| 46 | if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr)) |
| 47 | eth_env_set_enetaddr("ethaddr", mac_addr); |
| 48 | } |
| 49 | |
| 50 | if (!env_get("serial#")) { |
| 51 | len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial, |
| 52 | EFUSE_SN_SIZE); |
| 53 | if (len == EFUSE_SN_SIZE) |
| 54 | env_set("serial#", serial); |
| 55 | } |
| 56 | |
| 57 | return 0; |
Neil Armstrong | 4c2ea41 | 2017-10-12 15:50:32 +0200 | [diff] [blame] | 58 | } |