| Zachary P. Landau | 552d314 | 2006-01-26 17:37:59 -0500 | [diff] [blame] | 1 | /* |
| 2 | * MCF5272 Internal Memory Map |
| 3 | * |
| 4 | * Copyright (c) 2003 Josef Baumgartner <josef.baumgartner@telex.de> |
| 5 | * 2006 Zachary P. Landau <zachary.landau@labxtechnologies.com> |
| 6 | * |
| 7 | * See file CREDITS for list of people who contributed to this |
| 8 | * project. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License as |
| 12 | * published by the Free Software Foundation; either version 2 of |
| 13 | * the License, or (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 23 | * MA 02111-1307 USA |
| 24 | */ |
| 25 | |
| 26 | #ifndef __IMMAP_5271__ |
| 27 | #define __IMMAP_5271__ |
| 28 | |
| 29 | /* Interrupt module registers |
| 30 | */ |
| 31 | typedef struct int_ctrl { |
| 32 | uint int_icr1; |
| 33 | uint int_icr2; |
| 34 | uint int_icr3; |
| 35 | uint int_icr4; |
| 36 | uint int_isr; |
| 37 | uint int_pitr; |
| 38 | uint int_piwr; |
| 39 | uchar res1[3]; |
| 40 | uchar int_pivr; |
| 41 | } intctrl_t; |
| 42 | |
| 43 | /* Timer module registers |
| 44 | */ |
| 45 | typedef struct timer_ctrl { |
| 46 | ushort timer_tmr; |
| 47 | ushort res1; |
| 48 | ushort timer_trr; |
| 49 | ushort res2; |
| 50 | ushort timer_tcap; |
| 51 | ushort res3; |
| 52 | ushort timer_tcn; |
| 53 | ushort res4; |
| 54 | ushort timer_ter; |
| 55 | uchar res5[14]; |
| 56 | } timer_t; |
| 57 | |
| 58 | /* Fast ethernet controller registers |
| 59 | */ |
| 60 | typedef struct fec { |
| 61 | uint res1; |
| 62 | uint fec_ievent; |
| 63 | uint fec_imask; |
| 64 | uint res2; |
| 65 | uint fec_r_des_active; |
| 66 | uint fec_x_des_active; |
| 67 | uint res3[3]; |
| 68 | uint fec_ecntrl; |
| 69 | uint res4[6]; |
| 70 | uint fec_mii_data; |
| 71 | uint fec_mii_speed; |
| 72 | uint res5[7]; |
| 73 | uint fec_mibc; |
| 74 | uint res6[7]; |
| 75 | uint fec_r_cntrl; |
| 76 | uint res7[15]; |
| 77 | uint fec_x_cntrl; |
| 78 | uint res8[7]; |
| 79 | uint fec_addr_low; |
| 80 | uint fec_addr_high; |
| 81 | uint fec_opd; |
| 82 | uint res9[10]; |
| 83 | uint fec_ihash_table_high; |
| 84 | uint fec_ihash_table_low; |
| 85 | uint fec_ghash_table_high; |
| 86 | uint fec_ghash_table_low; |
| 87 | uint res10[7]; |
| 88 | uint fec_tfwr; |
| 89 | uint res11; |
| 90 | uint fec_r_bound; |
| 91 | uint fec_r_fstart; |
| 92 | uint res12[11]; |
| 93 | uint fec_r_des_start; |
| 94 | uint fec_x_des_start; |
| 95 | uint fec_r_buff_size; |
| 96 | } fec_t; |
| 97 | |
| 98 | #endif /* __IMMAP_5271__ */ |