Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 24cd101d92ee73db3f5bfe1d78e0090b3ec202ee / . / configs / anbernic-rgxx3-rk3566_defconfig
blob: 4dcf18e22caf2cd863bab3ac6843323555316bdd [file] [log] [blame]
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]1CONFIG_ARM=y
2CONFIG_SKIP_LOWLEVEL_INIT=y
3CONFIG_COUNTER_FREQUENCY=24000000
4CONFIG_ARCH_ROCKCHIP=y
Chris Morgan391c1102024-02-05 12:58:54 -0600[diff] [blame]5CONFIG_SPL_GPIO=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]6CONFIG_DEFAULT_DEVICE_TREE="rk3566-anbernic-rgxx3"
7CONFIG_ROCKCHIP_RK3568=y
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]8CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]9CONFIG_SPL_SERIAL=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]10CONFIG_TARGET_ANBERNIC_RGXX3_RK3566=y
Tom Rinic427a582024-10-08 09:18:32 -0600[diff] [blame]11CONFIG_SYS_LOAD_ADDR=0xc00800
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]12CONFIG_DEBUG_UART_BASE=0xFE660000
13CONFIG_DEBUG_UART_CLOCK=24000000
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]14CONFIG_DEBUG_UART=y
Tom Rinic427a582024-10-08 09:18:32 -0600[diff] [blame]15# CONFIG_EFI_LOADER is not set
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]16CONFIG_FIT=y
17CONFIG_FIT_VERBOSE=y
Chris Morgan391c1102024-02-05 12:58:54 -0600[diff] [blame]18CONFIG_SPL_FIT_SIGNATURE=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]19CONFIG_SPL_LOAD_FIT=y
Chris Morgan391c1102024-02-05 12:58:54 -0600[diff] [blame]20CONFIG_LEGACY_IMAGE_FORMAT=y
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]21CONFIG_OF_BOARD_SETUP=y
22CONFIG_OF_STDOUT_VIA_ALIAS=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]23CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-anbernic-rgxx3.dtb"
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]24# CONFIG_CONSOLE_MUX is not set
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]25# CONFIG_DISPLAY_CPUINFO is not set
26CONFIG_DISPLAY_BOARDINFO_LATE=y
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]27CONFIG_BOARD_RNG_SEED=y
Chris Morgan391c1102024-02-05 12:58:54 -0600[diff] [blame]28CONFIG_SPL_MAX_SIZE=0x40000
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]29CONFIG_SPL_PAD_TO=0x7f8000
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]30CONFIG_SPL_BOARD_INIT=y
31# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Chris Morgan391c1102024-02-05 12:58:54 -0600[diff] [blame]32CONFIG_SPL_POWER=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]33CONFIG_SPL_ATF=y
34CONFIG_CMD_PWM=y
35CONFIG_CMD_GPT=y
36CONFIG_CMD_MMC=y
37# CONFIG_CMD_SETEXPR is not set
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]38# CONFIG_CMD_CLS is not set
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]39# CONFIG_SPL_DOS_PARTITION is not set
40CONFIG_SPL_OF_CONTROL=y
41CONFIG_OF_LIVE=y
Jonas Karlman737739e2024-05-04 19:43:00 +0000[diff] [blame]42# CONFIG_OF_UPSTREAM is not set
Chris Morgan391c1102024-02-05 12:58:54 -0600[diff] [blame]43CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]44CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
Jerome Forissiere0f95512024-10-16 12:03:59 +0200[diff] [blame]45CONFIG_NO_NET=y
Chris Morgan391c1102024-02-05 12:58:54 -0600[diff] [blame]46CONFIG_SPL_DM_SEQ_ALIAS=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]47CONFIG_SPL_REGMAP=y
48CONFIG_SPL_SYSCON=y
49CONFIG_SPL_CLK=y
50CONFIG_ARM_SMCCC_FEATURES=y
51CONFIG_SCMI_FIRMWARE=y
52CONFIG_ROCKCHIP_GPIO=y
53CONFIG_SYS_I2C_ROCKCHIP=y
54CONFIG_MISC=y
55CONFIG_SUPPORT_EMMC_RPMB=y
56CONFIG_MMC_DW=y
57CONFIG_MMC_DW_ROCKCHIP=y
58CONFIG_MMC_SDHCI=y
59CONFIG_MMC_SDHCI_SDMA=y
60CONFIG_MMC_SDHCI_ROCKCHIP=y
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]61CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY=y
Chris Morgan391c1102024-02-05 12:58:54 -0600[diff] [blame]62CONFIG_SPL_PINCTRL=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]63CONFIG_DM_PMIC=y
64CONFIG_DM_PMIC_FAN53555=y
65CONFIG_PMIC_RK8XX=y
Chris Morgan391c1102024-02-05 12:58:54 -0600[diff] [blame]66CONFIG_SPL_DM_REGULATOR=y
67CONFIG_SPL_DM_REGULATOR_FIXED=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]68CONFIG_REGULATOR_RK8XX=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]69CONFIG_PWM_ROCKCHIP=y
70CONFIG_SPL_RAM=y
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]71# CONFIG_RAM_ROCKCHIP_DEBUG is not set
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]72# CONFIG_RNG_SMCCC_TRNG is not set
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]73CONFIG_BAUDRATE=1500000
74CONFIG_DEBUG_UART_SHIFT=2
75CONFIG_SYS_NS16550_MEM32=y
76CONFIG_SYSRESET=y
Chris Morgan27aad072023-05-15 11:00:31 -0500[diff] [blame]77CONFIG_VIDEO=y
78CONFIG_VIDEO_ROCKCHIP=y
79CONFIG_DISPLAY_ROCKCHIP_DW_MIPI=y
80CONFIG_VIDEO_BRIDGE=y
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]81CONFIG_REGEX=y
Chris Morgan391c1102024-02-05 12:58:54 -0600[diff] [blame]82# CONFIG_RSA is not set
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]83CONFIG_ERRNO_STR=y