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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Bo Shen58258bd2014-11-10 15:46:22 +08002/*
3 * Configuration settings for the SAMA5D4 Xplained ultra board.
4 *
5 * Copyright (C) 2014 Atmel
6 * Bo Shen <voice.shen@atmel.com>
Bo Shen58258bd2014-11-10 15:46:22 +08007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
Wu, Josh42587542015-03-30 14:51:19 +080012#include "at91-sama5_common.h"
Bo Shen58258bd2014-11-10 15:46:22 +080013
Bo Shen58258bd2014-11-10 15:46:22 +080014/* SDRAM */
Wenyou Yangd19b9012017-09-14 11:07:42 +080015#define CONFIG_SYS_SDRAM_BASE 0x20000000
Bo Shen58258bd2014-11-10 15:46:22 +080016#define CONFIG_SYS_SDRAM_SIZE 0x20000000
17
Bo Shene47c0072014-12-15 13:24:39 +080018#ifdef CONFIG_SPL_BUILD
Wenyou Yang3143ac22017-04-13 10:31:16 +080019#define CONFIG_SYS_INIT_SP_ADDR 0x218000
Bo Shene47c0072014-12-15 13:24:39 +080020#else
Bo Shen58258bd2014-11-10 15:46:22 +080021#define CONFIG_SYS_INIT_SP_ADDR \
Wenyou Yang3143ac22017-04-13 10:31:16 +080022 (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
Bo Shene47c0072014-12-15 13:24:39 +080023#endif
Bo Shen58258bd2014-11-10 15:46:22 +080024
25#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
26
Bo Shen58258bd2014-11-10 15:46:22 +080027#ifdef CONFIG_CMD_SF
Bo Shen58258bd2014-11-10 15:46:22 +080028#define CONFIG_SF_DEFAULT_SPEED 30000000
29#endif
30
31/* NAND flash */
Bo Shen58258bd2014-11-10 15:46:22 +080032#ifdef CONFIG_CMD_NAND
Bo Shen58258bd2014-11-10 15:46:22 +080033#define CONFIG_SYS_MAX_NAND_DEVICE 1
Wenyou Yangd19b9012017-09-14 11:07:42 +080034#define CONFIG_SYS_NAND_BASE 0x80000000
Bo Shen58258bd2014-11-10 15:46:22 +080035/* our ALE is AD21 */
36#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
37/* our CLE is AD22 */
38#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
39#define CONFIG_SYS_NAND_ONFI_DETECTION
Bo Shen58258bd2014-11-10 15:46:22 +080040#endif
41
Bo Shene47c0072014-12-15 13:24:39 +080042/* SPL */
Bo Shene47c0072014-12-15 13:24:39 +080043#define CONFIG_SPL_TEXT_BASE 0x200000
Wenyou Yang3143ac22017-04-13 10:31:16 +080044#define CONFIG_SPL_MAX_SIZE 0x18000
Bo Shene47c0072014-12-15 13:24:39 +080045#define CONFIG_SPL_BSS_START_ADDR 0x20000000
46#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
47#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
48#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
49
Bo Shene47c0072014-12-15 13:24:39 +080050#define CONFIG_SYS_MONITOR_LEN (512 << 10)
51
Wenyou Yange035ea72017-09-14 11:07:44 +080052#ifdef CONFIG_SD_BOOT
Bo Shene47c0072014-12-15 13:24:39 +080053#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
54#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Bo Shene47c0072014-12-15 13:24:39 +080055
56#elif CONFIG_SYS_USE_NANDFLASH
Wenyou Yange035ea72017-09-14 11:07:44 +080057#elif CONFIG_SPI_BOOT
Wenyou Yange035ea72017-09-14 11:07:44 +080058#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x10000
59
60#elif CONFIG_NAND_BOOT
Bo Shene47c0072014-12-15 13:24:39 +080061#define CONFIG_SPL_NAND_DRIVERS
62#define CONFIG_SPL_NAND_BASE
Wenyou Yange035ea72017-09-14 11:07:44 +080063#endif
Bo Shene47c0072014-12-15 13:24:39 +080064#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
65#define CONFIG_SYS_NAND_5_ADDR_CYCLE
66#define CONFIG_SYS_NAND_PAGE_SIZE 0x1000
67#define CONFIG_SYS_NAND_PAGE_COUNT 64
68#define CONFIG_SYS_NAND_OOBSIZE 224
69#define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000
70#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
Bo Shene47c0072014-12-15 13:24:39 +080071
Bo Shen58258bd2014-11-10 15:46:22 +080072#endif