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Haavard Skinnemoen2f5bfb72008-05-16 11:10:33 +02001/*
2 * SPI flash internal definitions
3 *
4 * Copyright (C) 2008 Atmel Corporation
Jagannadha Sutradharudu Teki25dc86a2013-10-02 19:38:49 +05305 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
6 *
Jagannadha Sutradharudu Tekid1452702013-10-10 22:32:55 +05307 * SPDX-License-Identifier: GPL-2.0+
Haavard Skinnemoen2f5bfb72008-05-16 11:10:33 +02008 */
9
Jagannadha Sutradharudu Teki84fb8632013-10-10 22:14:09 +053010#ifndef _SF_INTERNAL_H_
11#define _SF_INTERNAL_H_
Haavard Skinnemoen2f5bfb72008-05-16 11:10:33 +020012
Simon Glassd34b4562014-10-13 23:42:04 -060013#include <linux/types.h>
14#include <linux/compiler.h>
15
16/* Dual SPI flash memories - see SPI_COMM_DUAL_... */
17enum spi_dual_flash {
18 SF_SINGLE_FLASH = 0,
Jagan Tekice0121c2015-12-14 18:12:04 +053019 SF_DUAL_STACKED_FLASH = BIT(0),
20 SF_DUAL_PARALLEL_FLASH = BIT(1),
Simon Glassd34b4562014-10-13 23:42:04 -060021};
22
Jagan Teki4537cec2015-09-29 11:17:02 +053023enum spi_nor_option_flags {
Jagan Tekice0121c2015-12-14 18:12:04 +053024 SNOR_F_SST_WR = BIT(0),
25 SNOR_F_USE_FSR = BIT(1),
Jagan Teki4537cec2015-09-29 11:17:02 +053026};
27
Jagannadha Sutradharudu Tekica799862014-01-11 16:50:45 +053028#define SPI_FLASH_3B_ADDR_LEN 3
29#define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN)
Jagannadha Sutradharudu Teki25dc86a2013-10-02 19:38:49 +053030#define SPI_FLASH_16MB_BOUN 0x1000000
Haavard Skinnemoen2f5bfb72008-05-16 11:10:33 +020031
Jagannadha Sutradharudu Teki725c64e2013-12-26 13:54:57 +053032/* CFI Manufacture ID's */
33#define SPI_FLASH_CFI_MFR_SPANSION 0x01
34#define SPI_FLASH_CFI_MFR_STMICRO 0x20
Jagannadha Sutradharudu Teki754c73c2013-12-26 14:13:36 +053035#define SPI_FLASH_CFI_MFR_MACRONIX 0xc2
Fabio Estevam0a2bf5c2015-11-17 16:50:53 -020036#define SPI_FLASH_CFI_MFR_SST 0xbf
Jagannadha Sutradharudu Teki725c64e2013-12-26 13:54:57 +053037#define SPI_FLASH_CFI_MFR_WINBOND 0xef
Jagan Tekib7233752015-09-30 02:01:23 +053038#define SPI_FLASH_CFI_MFR_ATMEL 0x1f
Jagannadha Sutradharudu Teki725c64e2013-12-26 13:54:57 +053039
Jagannadha Sutradharudu Teki25dc86a2013-10-02 19:38:49 +053040/* Erase commands */
41#define CMD_ERASE_4K 0x20
Jagannadha Sutradharudu Teki25dc86a2013-10-02 19:38:49 +053042#define CMD_ERASE_CHIP 0xc7
43#define CMD_ERASE_64K 0xd8
44
45/* Write commands */
Mike Frysinger1302bec2012-01-28 16:26:03 -080046#define CMD_WRITE_STATUS 0x01
Mike Frysinger301e9b42011-04-25 06:58:29 +000047#define CMD_PAGE_PROGRAM 0x02
Mike Frysinger79112112011-04-25 06:59:53 +000048#define CMD_WRITE_DISABLE 0x04
Mike Frysinger53421bb2011-01-10 02:20:13 -050049#define CMD_WRITE_ENABLE 0x06
Jagan Teki11424c02015-12-14 18:03:54 +053050#define CMD_QUAD_PAGE_PROGRAM 0x32
Jagan Tekic26abdb2015-12-14 18:15:39 +053051#define CMD_WRITE_EVCR 0x61
Mike Frysinger37e13bc2011-01-10 02:20:12 -050052
Jagannadha Sutradharudu Teki25dc86a2013-10-02 19:38:49 +053053/* Read commands */
54#define CMD_READ_ARRAY_SLOW 0x03
55#define CMD_READ_ARRAY_FAST 0x0b
Jagannadha Sutradharudu Teki02eee9a2014-01-11 15:10:28 +053056#define CMD_READ_DUAL_OUTPUT_FAST 0x3b
57#define CMD_READ_DUAL_IO_FAST 0xbb
Jagannadha Sutradharudu Tekie0ebabc2014-01-11 15:13:11 +053058#define CMD_READ_QUAD_OUTPUT_FAST 0x6b
Jagannadha Sutradharudu Teki45462302013-12-24 15:24:31 +053059#define CMD_READ_QUAD_IO_FAST 0xeb
Jagannadha Sutradharudu Teki25dc86a2013-10-02 19:38:49 +053060#define CMD_READ_ID 0x9f
Jagan Teki11424c02015-12-14 18:03:54 +053061#define CMD_READ_STATUS 0x05
62#define CMD_READ_STATUS1 0x35
63#define CMD_READ_CONFIG 0x35
64#define CMD_FLAG_STATUS 0x70
Jagan Tekic26abdb2015-12-14 18:15:39 +053065#define CMD_READ_EVCR 0x65
Jagannadha Sutradharudu Teki29d70c92013-06-19 15:37:09 +053066
Jagannadha Sutradharudu Tekice08a712013-06-19 15:31:23 +053067/* Bank addr access commands */
Jagannadha Sutradharudu Teki25dc86a2013-10-02 19:38:49 +053068#ifdef CONFIG_SPI_FLASH_BAR
Jagannadha Sutradharudu Tekic6d173d2013-06-19 15:33:58 +053069# define CMD_BANKADDR_BRWR 0x17
70# define CMD_BANKADDR_BRRD 0x16
71# define CMD_EXTNADDR_WREAR 0xC5
72# define CMD_EXTNADDR_RDEAR 0xC8
73#endif
Jagannadha Sutradharudu Tekice08a712013-06-19 15:31:23 +053074
Mike Frysinger37e13bc2011-01-10 02:20:12 -050075/* Common status */
Jagan Tekice0121c2015-12-14 18:12:04 +053076#define STATUS_WIP BIT(0)
77#define STATUS_QEB_WINSPAN BIT(1)
78#define STATUS_QEB_MXIC BIT(6)
79#define STATUS_PEC BIT(7)
Jagan Tekic26abdb2015-12-14 18:15:39 +053080#define STATUS_QEB_MICRON BIT(7)
Fabio Estevamd9709692015-11-05 12:43:41 -020081#define SR_BP0 BIT(2) /* Block protect 0 */
82#define SR_BP1 BIT(3) /* Block protect 1 */
83#define SR_BP2 BIT(4) /* Block protect 2 */
Mike Frysinger37e13bc2011-01-10 02:20:12 -050084
Jagannadha Sutradharudu Teki25dc86a2013-10-02 19:38:49 +053085/* Flash timeout values */
86#define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
Jagan Teki79436122015-06-27 00:51:30 +053087#define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ)
Jagannadha Sutradharudu Teki25dc86a2013-10-02 19:38:49 +053088#define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ)
89
90/* SST specific */
91#ifdef CONFIG_SPI_FLASH_SST
Jagannadha Sutradharudu Tekif3b2dd82013-10-07 19:34:56 +053092# define CMD_SST_BP 0x02 /* Byte Program */
Jagan Teki79436122015-06-27 00:51:30 +053093# define CMD_SST_AAI_WP 0xAD /* Auto Address Incr Word Program */
Jagannadha Sutradharudu Teki25dc86a2013-10-02 19:38:49 +053094
95int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
96 const void *buf);
Bin Mengfcbfc172014-12-12 19:36:13 +053097int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
98 const void *buf);
Jagannadha Sutradharudu Teki25dc86a2013-10-02 19:38:49 +053099#endif
100
Jagan Teki77ae47b2016-10-30 23:16:10 +0530101#define JEDEC_MFR(info) ((info)->id[0])
102#define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2]))
103#define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4]))
Jagan Teki8864d9f2016-10-30 23:16:17 +0530104#define SPI_FLASH_MAX_ID_LEN 6
Jagan Teki77ae47b2016-10-30 23:16:10 +0530105
Jagan Teki77ae47b2016-10-30 23:16:10 +0530106struct spi_flash_info {
Jagan Tekib7faef52016-10-30 23:16:13 +0530107 /* Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) */
108 const char *name;
Jagan Teki77ae47b2016-10-30 23:16:10 +0530109
110 /*
111 * This array stores the ID bytes.
112 * The first three bytes are the JEDIC ID.
113 * JEDEC ID zero means "no ID" (mostly older chips).
114 */
Jagan Tekib1c755c2016-10-30 23:16:16 +0530115 u8 id[SPI_FLASH_MAX_ID_LEN];
Jagan Teki77ae47b2016-10-30 23:16:10 +0530116 u8 id_len;
117
Jagan Tekib7faef52016-10-30 23:16:13 +0530118 /*
119 * The size listed here is what works with SPINOR_OP_SE, which isn't
120 * necessarily called a "sector" by the vendor.
121 */
122 u32 sector_size;
Jagan Teki49e65792016-10-30 23:16:15 +0530123 u32 n_sectors;
Jagan Teki235afa82016-08-08 19:25:55 +0530124
Jagan Tekib7faef52016-10-30 23:16:13 +0530125 u16 page_size;
Jagan Teki77ae47b2016-10-30 23:16:10 +0530126
Jagan Tekib7faef52016-10-30 23:16:13 +0530127 u16 flags;
128#define SECT_4K BIT(0) /* CMD_ERASE_4K works uniformly */
129#define E_FSR BIT(1) /* use flag status register for */
130#define SST_WR BIT(2) /* use SST byte/word programming */
131#define WR_QPP BIT(3) /* use Quad Page Program */
132#define RD_QUAD BIT(4) /* use Quad Read */
133#define RD_DUAL BIT(5) /* use Dual Read */
134#define RD_QUADIO BIT(6) /* use Quad IO Read */
135#define RD_DUALIO BIT(7) /* use Dual IO Read */
Jagan Teki235afa82016-08-08 19:25:55 +0530136#define RD_FULL (RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO)
Simon Glassd34b4562014-10-13 23:42:04 -0600137};
138
Jagan Teki77ae47b2016-10-30 23:16:10 +0530139extern const struct spi_flash_info spi_flash_ids[];
Simon Glassd34b4562014-10-13 23:42:04 -0600140
Haavard Skinnemoen2f5bfb72008-05-16 11:10:33 +0200141/* Send a single-byte command to the device and read the response */
142int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
143
144/*
145 * Send a multi-byte command to the device and read the response. Used
146 * for flash array reads, etc.
147 */
148int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
149 size_t cmd_len, void *data, size_t data_len);
150
151/*
152 * Send a multi-byte command to the device followed by (optional)
153 * data. Used for programming the flash array, etc.
154 */
155int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
156 const void *data, size_t data_len);
157
Mike Frysinger301e9b42011-04-25 06:58:29 +0000158
Jagannadha Sutradharudu Teki25dc86a2013-10-02 19:38:49 +0530159/* Flash erase(sectors) operation, support all possible erase commands */
160int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
Jagannadha Sutradharudu Teki08032422013-10-02 19:34:53 +0530161
Fabio Estevam1cd87612015-11-05 12:43:42 -0200162/* Lock stmicro spi flash region */
163int stm_lock(struct spi_flash *flash, u32 ofs, size_t len);
164
165/* Unlock stmicro spi flash region */
166int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len);
167
168/* Check if a stmicro spi flash region is completely locked */
169int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len);
170
Jagannadha Sutradharudu Teki25dc86a2013-10-02 19:38:49 +0530171/* Enable writing on the SPI flash */
Mike Frysinger8ec7f4c2011-04-23 23:05:55 +0000172static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
173{
174 return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0);
175}
176
Jagannadha Sutradharudu Teki25dc86a2013-10-02 19:38:49 +0530177/* Disable writing on the SPI flash */
Mike Frysinger79112112011-04-25 06:59:53 +0000178static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
179{
180 return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0);
181}
182
183/*
Jagannadha Sutradharudu Tekidc78b852013-06-21 19:19:00 +0530184 * Used for spi_flash write operation
185 * - SPI claim
186 * - spi_flash_cmd_write_enable
187 * - spi_flash_cmd_write
Jagan Tekiff0e43e2016-10-30 23:16:25 +0530188 * - spi_flash_wait_till_ready
Jagannadha Sutradharudu Tekidc78b852013-06-21 19:19:00 +0530189 * - SPI release
190 */
191int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
192 size_t cmd_len, const void *buf, size_t buf_len);
Mike Frysinger37e13bc2011-01-10 02:20:12 -0500193
194/*
Jagannadha Sutradharudu Teki25dc86a2013-10-02 19:38:49 +0530195 * Flash write operation, support all possible write commands.
196 * Write the requested data out breaking it up into multiple write
197 * commands as needed per the write size.
Mike Frysinger37e13bc2011-01-10 02:20:12 -0500198 */
Jagannadha Sutradharudu Teki25dc86a2013-10-02 19:38:49 +0530199int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
200 size_t len, const void *buf);
201
202/*
203 * Same as spi_flash_cmd_read() except it also claims/releases the SPI
204 * bus. Used as common part of the ->read() operation.
205 */
206int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
207 size_t cmd_len, void *data, size_t data_len);
208
209/* Flash read operation, support all possible read commands */
210int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
211 size_t len, void *data);
Mike Frysinger37e13bc2011-01-10 02:20:12 -0500212
Daniel Schwierzeck06cfc032015-04-27 07:42:04 +0200213#ifdef CONFIG_SPI_FLASH_MTD
214int spi_flash_mtd_register(struct spi_flash *flash);
215void spi_flash_mtd_unregister(void);
216#endif
217
Jagan Tekie6401d82015-12-11 21:36:34 +0530218/**
219 * spi_flash_scan - scan the SPI FLASH
Jagan Tekie6401d82015-12-11 21:36:34 +0530220 * @flash: the spi flash structure
221 *
222 * The drivers can use this fuction to scan the SPI FLASH.
223 * In the scanning, it will try to get all the necessary information to
224 * fill the spi_flash{}.
225 *
226 * Return: 0 for success, others for failure.
227 */
Jagan Teki4abfb982015-12-06 21:33:32 +0530228int spi_flash_scan(struct spi_flash *flash);
Jagan Tekie6401d82015-12-11 21:36:34 +0530229
Jagannadha Sutradharudu Teki84fb8632013-10-10 22:14:09 +0530230#endif /* _SF_INTERNAL_H_ */