Stefan Roese | 4666990 | 2007-10-05 17:07:50 +0200 | [diff] [blame] | 1 | /* |
Stefan Roese | 1b25436 | 2008-05-08 11:01:09 +0200 | [diff] [blame] | 2 | * (C) Copyright 2007-2008 |
Stefan Roese | 4666990 | 2007-10-05 17:07:50 +0200 | [diff] [blame] | 3 | * Stefan Roese, DENX Software Engineering, sr@denx.de. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
Stefan Roese | 4666990 | 2007-10-05 17:07:50 +0200 | [diff] [blame] | 24 | #include <common.h> |
| 25 | #include <watchdog.h> |
| 26 | #include <command.h> |
| 27 | #include <asm/cache.h> |
Stefan Roese | 247e9d7 | 2010-09-09 19:18:00 +0200 | [diff] [blame^] | 28 | #include <asm/ppc4xx.h> |
Stefan Roese | 4666990 | 2007-10-05 17:07:50 +0200 | [diff] [blame] | 29 | |
Stefan Roese | 1b25436 | 2008-05-08 11:01:09 +0200 | [diff] [blame] | 30 | #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) |
Stefan Roese | 4666990 | 2007-10-05 17:07:50 +0200 | [diff] [blame] | 31 | #include <libfdt.h> |
| 32 | #include <libfdt_env.h> |
Stefan Roese | fbcee00 | 2007-12-13 14:52:53 +0100 | [diff] [blame] | 33 | #include <fdt_support.h> |
Stefan Roese | 1e01fd2 | 2008-04-22 12:20:32 +0200 | [diff] [blame] | 34 | #include <asm/4xx_pcie.h> |
Stefan Roese | 4666990 | 2007-10-05 17:07:50 +0200 | [diff] [blame] | 35 | |
Stefan Roese | 19b77f4 | 2007-10-23 11:31:05 +0200 | [diff] [blame] | 36 | DECLARE_GLOBAL_DATA_PTR; |
| 37 | |
Stefan Roese | 1b25436 | 2008-05-08 11:01:09 +0200 | [diff] [blame] | 38 | void __ft_board_setup(void *blob, bd_t *bd) |
| 39 | { |
Stefan Roese | 1b25436 | 2008-05-08 11:01:09 +0200 | [diff] [blame] | 40 | int rc; |
Stefan Roese | 1c97e0c | 2008-10-13 10:45:14 +0200 | [diff] [blame] | 41 | int i; |
| 42 | u32 bxcr; |
| 43 | u32 ranges[EBC_NUM_BANKS * 4]; |
| 44 | u32 *p = ranges; |
Wolfgang Denk | e6b6ddc | 2009-10-20 23:12:13 +0200 | [diff] [blame] | 45 | char ebc_path[] = "/plb/opb/ebc"; |
Stefan Roese | 1b25436 | 2008-05-08 11:01:09 +0200 | [diff] [blame] | 46 | |
| 47 | ft_cpu_setup(blob, bd); |
| 48 | |
Stefan Roese | 1c97e0c | 2008-10-13 10:45:14 +0200 | [diff] [blame] | 49 | /* |
| 50 | * Read 4xx EBC bus bridge registers to get mappings of the |
| 51 | * peripheral banks into the OPB/PLB address space |
| 52 | */ |
| 53 | for (i = 0; i < EBC_NUM_BANKS; i++) { |
Stefan Roese | 918010a | 2009-09-09 16:25:29 +0200 | [diff] [blame] | 54 | mtdcr(EBC0_CFGADDR, EBC_BXCR(i)); |
| 55 | bxcr = mfdcr(EBC0_CFGDATA); |
Stefan Roese | 1c97e0c | 2008-10-13 10:45:14 +0200 | [diff] [blame] | 56 | |
| 57 | if ((bxcr & EBC_BXCR_BU_MASK) != EBC_BXCR_BU_NONE) { |
| 58 | *p++ = i; |
| 59 | *p++ = 0; |
| 60 | *p++ = bxcr & EBC_BXCR_BAS_MASK; |
| 61 | *p++ = EBC_BXCR_BANK_SIZE(bxcr); |
Stefan Roese | f251c42 | 2009-10-16 10:01:09 +0200 | [diff] [blame] | 62 | |
| 63 | #ifdef CONFIG_FDT_FIXUP_NOR_FLASH_SIZE |
| 64 | /* Try to update reg property in nor flash node too */ |
| 65 | fdt_fixup_nor_flash_size(blob, i, |
| 66 | EBC_BXCR_BANK_SIZE(bxcr)); |
| 67 | #endif |
Stefan Roese | 1c97e0c | 2008-10-13 10:45:14 +0200 | [diff] [blame] | 68 | } |
Stefan Roese | ff459fb | 2008-07-10 13:52:44 +0200 | [diff] [blame] | 69 | } |
Stefan Roese | 1c97e0c | 2008-10-13 10:45:14 +0200 | [diff] [blame] | 70 | |
| 71 | /* Some 405 PPC's have EBC as direct PLB child in the dts */ |
Stefan Roese | f251c42 | 2009-10-16 10:01:09 +0200 | [diff] [blame] | 72 | if (fdt_path_offset(blob, ebc_path) < 0) |
Stefan Roese | 1c97e0c | 2008-10-13 10:45:14 +0200 | [diff] [blame] | 73 | strcpy(ebc_path, "/plb/ebc"); |
| 74 | rc = fdt_find_and_setprop(blob, ebc_path, "ranges", ranges, |
| 75 | (p - ranges) * sizeof(u32), 1); |
| 76 | if (rc) { |
| 77 | printf("Unable to update property EBC mappings, err=%s\n", |
Stefan Roese | 1b25436 | 2008-05-08 11:01:09 +0200 | [diff] [blame] | 78 | fdt_strerror(rc)); |
Stefan Roese | 1c97e0c | 2008-10-13 10:45:14 +0200 | [diff] [blame] | 79 | } |
Stefan Roese | 1b25436 | 2008-05-08 11:01:09 +0200 | [diff] [blame] | 80 | } |
| 81 | void ft_board_setup(void *blob, bd_t *bd) __attribute__((weak, alias("__ft_board_setup"))); |
| 82 | |
Stefan Roese | 1e01fd2 | 2008-04-22 12:20:32 +0200 | [diff] [blame] | 83 | /* |
| 84 | * Fixup all PCIe nodes by setting the device_type property |
| 85 | * to "pci-endpoint" instead is "pci" for endpoint ports. |
| 86 | * This property will get checked later by the Linux driver |
| 87 | * to properly configure the PCIe port in Linux (again). |
| 88 | */ |
| 89 | void fdt_pcie_setup(void *blob) |
| 90 | { |
| 91 | const char *compat = "ibm,plb-pciex"; |
| 92 | const char *prop = "device_type"; |
| 93 | const char *prop_val = "pci-endpoint"; |
| 94 | const u32 *port; |
| 95 | int no; |
| 96 | int rc; |
| 97 | |
| 98 | /* Search first PCIe node */ |
| 99 | no = fdt_node_offset_by_compatible(blob, -1, compat); |
| 100 | while (no != -FDT_ERR_NOTFOUND) { |
| 101 | port = fdt_getprop(blob, no, "port", NULL); |
| 102 | if (port == NULL) { |
| 103 | printf("WARNING: could not find port property\n"); |
| 104 | } else { |
| 105 | if (is_end_point(*port)) { |
| 106 | rc = fdt_setprop(blob, no, prop, prop_val, |
| 107 | strlen(prop_val) + 1); |
| 108 | if (rc < 0) |
| 109 | printf("WARNING: could not set %s for %s: %s.\n", |
| 110 | prop, compat, fdt_strerror(rc)); |
| 111 | } |
| 112 | } |
| 113 | |
| 114 | /* Jump to next PCIe node */ |
| 115 | no = fdt_node_offset_by_compatible(blob, no, compat); |
| 116 | } |
| 117 | } |
| 118 | |
Stefan Roese | 4666990 | 2007-10-05 17:07:50 +0200 | [diff] [blame] | 119 | void ft_cpu_setup(void *blob, bd_t *bd) |
| 120 | { |
Stefan Roese | 4666990 | 2007-10-05 17:07:50 +0200 | [diff] [blame] | 121 | sys_info_t sys_info; |
Matthias Fuchs | acb07af | 2009-02-03 22:13:16 +0100 | [diff] [blame] | 122 | int off, ndepth = 0; |
Stefan Roese | 4666990 | 2007-10-05 17:07:50 +0200 | [diff] [blame] | 123 | |
Stefan Roese | fbcee00 | 2007-12-13 14:52:53 +0100 | [diff] [blame] | 124 | get_sys_info(&sys_info); |
Stefan Roese | 4666990 | 2007-10-05 17:07:50 +0200 | [diff] [blame] | 125 | |
Stefan Roese | 16dbccc | 2007-12-18 08:44:51 +0100 | [diff] [blame] | 126 | do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, "timebase-frequency", |
| 127 | bd->bi_intfreq, 1); |
| 128 | do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, "clock-frequency", |
| 129 | bd->bi_intfreq, 1); |
Stefan Roese | fbcee00 | 2007-12-13 14:52:53 +0100 | [diff] [blame] | 130 | do_fixup_by_path_u32(blob, "/plb", "clock-frequency", sys_info.freqPLB, 1); |
| 131 | do_fixup_by_path_u32(blob, "/plb/opb", "clock-frequency", sys_info.freqOPB, 1); |
Markus Brunner | 9c4ebb0 | 2008-04-28 08:47:47 +0200 | [diff] [blame] | 132 | |
| 133 | if (fdt_path_offset(blob, "/plb/opb/ebc") >= 0) |
| 134 | do_fixup_by_path_u32(blob, "/plb/opb/ebc", "clock-frequency", |
| 135 | sys_info.freqEBC, 1); |
| 136 | else |
| 137 | do_fixup_by_path_u32(blob, "/plb/ebc", "clock-frequency", |
| 138 | sys_info.freqEBC, 1); |
| 139 | |
Stefan Roese | fbcee00 | 2007-12-13 14:52:53 +0100 | [diff] [blame] | 140 | fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); |
Stefan Roese | 4666990 | 2007-10-05 17:07:50 +0200 | [diff] [blame] | 141 | |
| 142 | /* |
Matthias Fuchs | acb07af | 2009-02-03 22:13:16 +0100 | [diff] [blame] | 143 | * Fixup all UART clocks for CPU internal UARTs |
| 144 | * (only these UARTs are definitely clocked by gd->uart_clk) |
| 145 | * |
| 146 | * These UARTs are direct childs of /plb/opb. This code |
| 147 | * does not touch any UARTs that are connected to the ebc. |
Stefan Roese | 4666990 | 2007-10-05 17:07:50 +0200 | [diff] [blame] | 148 | */ |
Matthias Fuchs | acb07af | 2009-02-03 22:13:16 +0100 | [diff] [blame] | 149 | off = fdt_path_offset(blob, "/plb/opb"); |
| 150 | while ((off = fdt_next_node(blob, off, &ndepth)) >= 0) { |
| 151 | /* |
| 152 | * process all sub nodes and stop when we are back |
| 153 | * at the starting depth |
| 154 | */ |
| 155 | if (ndepth <= 0) |
| 156 | break; |
| 157 | |
| 158 | /* only update direct childs */ |
| 159 | if ((ndepth == 1) && |
| 160 | (fdt_node_check_compatible(blob, off, "ns16550") == 0)) |
| 161 | fdt_setprop(blob, off, |
| 162 | "clock-frequency", |
| 163 | (void*)&(gd->uart_clk), 4); |
| 164 | } |
Stefan Roese | 4666990 | 2007-10-05 17:07:50 +0200 | [diff] [blame] | 165 | |
| 166 | /* |
Stefan Roese | ac9f218 | 2007-12-14 08:41:29 +0100 | [diff] [blame] | 167 | * Fixup all ethernet nodes |
| 168 | * Note: aliases in the dts are required for this |
Stefan Roese | 4666990 | 2007-10-05 17:07:50 +0200 | [diff] [blame] | 169 | */ |
Kumar Gala | fabda92 | 2008-08-19 15:41:18 -0500 | [diff] [blame] | 170 | fdt_fixup_ethernet(blob); |
Stefan Roese | 1e01fd2 | 2008-04-22 12:20:32 +0200 | [diff] [blame] | 171 | |
| 172 | /* |
| 173 | * Fixup all available PCIe nodes by setting the device_type property |
| 174 | */ |
| 175 | fdt_pcie_setup(blob); |
Stefan Roese | 4666990 | 2007-10-05 17:07:50 +0200 | [diff] [blame] | 176 | } |
Stefan Roese | 1b25436 | 2008-05-08 11:01:09 +0200 | [diff] [blame] | 177 | #endif /* CONFIG_OF_LIBFDT && CONFIG_OF_BOARD_SETUP */ |