Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 1 | CONFIG_ARM=y |
2 | CONFIG_ARCH_MX5=y | ||||
Tom Rini | 07edfae | 2018-02-03 12:10:38 -0500 | [diff] [blame] | 3 | CONFIG_SYS_TEXT_BASE=0x77800000 |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 4 | CONFIG_TARGET_MX53CX9020=y |
Tom Rini | f226038 | 2018-08-16 08:16:24 -0400 | [diff] [blame] | 5 | CONFIG_NR_DRAM_BANKS=2 |
Tom Rini | c9285bf | 2019-04-29 15:54:04 -0400 | [diff] [blame] | 6 | # CONFIG_CMD_BMODE is not set |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 7 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/beckhoff/mx53cx9020/imximage.cfg" |
8 | CONFIG_BOOTDELAY=1 | ||||
Adam Ford | 58dbf86 | 2018-02-06 07:58:59 -0600 | [diff] [blame] | 9 | CONFIG_SUPPORT_RAW_INITRD=y |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 10 | CONFIG_HUSH_PARSER=y |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 11 | CONFIG_CMD_BOOTZ=y |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 12 | CONFIG_CMD_MMC=y |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 13 | # CONFIG_CMD_SETEXPR is not set |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 14 | CONFIG_CMD_DHCP=y |
15 | CONFIG_CMD_MII=y | ||||
16 | CONFIG_CMD_PING=y | ||||
Tom Rini | e8f8d67 | 2018-04-17 09:22:31 -0400 | [diff] [blame] | 17 | CONFIG_CMD_PXE=y |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 18 | CONFIG_CMD_EXT2=y |
19 | CONFIG_CMD_EXT4=y | ||||
20 | CONFIG_CMD_FAT=y | ||||
21 | CONFIG_CMD_FS_GENERIC=y | ||||
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 22 | CONFIG_OF_CONTROL=y |
Tom Rini | 7406032 | 2018-09-03 15:26:12 -0400 | [diff] [blame] | 23 | CONFIG_DEFAULT_DEVICE_TREE="imx53-cx9020" |
Tom Rini | 5b0b040 | 2017-08-28 07:16:32 -0400 | [diff] [blame] | 24 | CONFIG_ENV_IS_IN_MMC=y |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 25 | CONFIG_FPGA_ALTERA=y |
26 | CONFIG_FPGA_CYCLON2=y | ||||
Steffen Dirkwinkel | 098e9ef | 2019-04-17 13:57:14 +0200 | [diff] [blame] | 27 | CONFIG_DM_GPIO=y |
Tom Rini | 66ea5c7 | 2019-05-26 14:45:25 -0400 | [diff] [blame] | 28 | CONFIG_DM_MMC=y |
Yangbo Lu | 7334038 | 2019-06-21 11:42:28 +0800 | [diff] [blame] | 29 | CONFIG_FSL_ESDHC_IMX=y |
Masahiro Yamada | 74f09b8 | 2016-12-07 22:10:25 +0900 | [diff] [blame] | 30 | CONFIG_FEC_MXC=y |
Adam Ford | 5370547 | 2018-07-20 23:03:57 -0500 | [diff] [blame] | 31 | CONFIG_MII=y |
Patrick Bruenn | ba81b04 | 2016-11-04 11:57:02 +0100 | [diff] [blame] | 32 | CONFIG_PINCTRL=y |
33 | CONFIG_PINCTRL_IMX5=y | ||||
Masahiro Yamada | 74f09b8 | 2016-12-07 22:10:25 +0900 | [diff] [blame] | 34 | CONFIG_MXC_UART=y |
Steffen Dirkwinkel | 3173618 | 2019-04-17 13:57:17 +0200 | [diff] [blame] | 35 | CONFIG_DM_VIDEO=y |
Anatolij Gustschin | e6a7ef5 | 2019-03-18 23:29:33 +0100 | [diff] [blame] | 36 | CONFIG_VIDEO_IPUV3=y |