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gaurav ranaf79323c2015-03-10 14:08:50 +05301/*
2 * Copyright 2015 Freescale Semiconductor, Inc.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef __FSL_SECURE_BOOT_H
8#define __FSL_SECURE_BOOT_H
9
Aneesh Bansal43104702016-01-22 16:37:24 +053010#ifdef CONFIG_CHAIN_OF_TRUST
Aneesh Bansald31bb3e2015-07-31 14:10:03 +053011#define CONFIG_FSL_SEC_MON
Aneesh Bansald31bb3e2015-07-31 14:10:03 +053012
Simon Glass3aa66122016-09-12 23:18:23 -060013#ifdef CONFIG_SPL_BUILD
Sumit Gargbdddd6e2016-06-14 13:52:38 -040014/*
15 * Define the key hash for U-Boot here if public/private key pair used to
16 * sign U-boot are different from the SRK hash put in the fuse
17 * Example of defining KEY_HASH is
18 * #define CONFIG_SPL_UBOOT_KEY_HASH \
19 * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
20 * else leave it defined as NULL
21 */
22
23#define CONFIG_SPL_UBOOT_KEY_HASH NULL
24#endif /* ifdef CONFIG_SPL_BUILD */
25
Ruchika Guptad6b89202017-04-17 18:07:17 +053026#define CONFIG_KEY_REVOCATION
27
Sumit Gargbdddd6e2016-06-14 13:52:38 -040028#ifndef CONFIG_SPL_BUILD
Aneesh Bansald31bb3e2015-07-31 14:10:03 +053029#ifndef CONFIG_SYS_RAMBOOT
30/* The key used for verification of next level images
31 * is picked up from an Extension Table which has
32 * been verified by the ISBC (Internal Secure boot Code)
33 * in boot ROM of the SoC.
34 * The feature is only applicable in case of NOR boot and is
35 * not applicable in case of RAMBOOT (NAND, SD, SPI).
Udit Agarwal990a9972017-02-09 21:36:11 +053036 * For LS, this feature is available for all device if IE Table
37 * is copied to XIP memory
38 * Also, for LS, ISBC doesn't verify this table.
Aneesh Bansald31bb3e2015-07-31 14:10:03 +053039 */
40#define CONFIG_FSL_ISBC_KEY_EXT
Aneesh Bansald31bb3e2015-07-31 14:10:03 +053041
Saksham Jain6121f082016-03-23 16:24:34 +053042#endif
43
Vinitha Pillai-B572238a3c6452017-03-23 13:48:16 +053044#if defined(CONFIG_FSL_LAYERSCAPE)
45/*
46 * For fsl layerscape based platforms, ESBC image Address in Header
47 * is 64 bit.
Saksham Jainc0c38d22016-03-23 16:24:35 +053048 */
Aneesh Bansal962021a2016-01-22 16:37:22 +053049#define CONFIG_ESBC_ADDR_64BIT
50#endif
51
York Sun4ce6fbf2017-03-27 11:41:01 -070052#ifdef CONFIG_ARCH_LS2080A
Saksham Jainf0eb2ca2016-03-23 16:24:38 +053053#define CONFIG_EXTRA_ENV \
54 "setenv fdt_high 0xa0000000;" \
55 "setenv initrd_high 0xcfffffff;" \
56 "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
57#else
gaurav ranaf79323c2015-03-10 14:08:50 +053058#define CONFIG_EXTRA_ENV \
Sumit Garg45642832016-06-14 13:52:39 -040059 "setenv fdt_high 0xffffffff;" \
60 "setenv initrd_high 0xffffffff;" \
gaurav ranaf79323c2015-03-10 14:08:50 +053061 "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
Saksham Jainf0eb2ca2016-03-23 16:24:38 +053062#endif
gaurav ranaf79323c2015-03-10 14:08:50 +053063
Saksham Jain503eab92016-03-23 16:24:37 +053064/* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from
65 * Non-XIP Memory (Nand/SD)*/
Udit Agarwal6b29d232017-01-06 15:58:56 +053066#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_FSL_LSCH3) || \
Ruchika Guptaba688752017-04-17 18:07:18 +053067 defined(CONFIG_SD_BOOT) || defined(CONFIG_NAND_BOOT)
Saksham Jain503eab92016-03-23 16:24:37 +053068#define CONFIG_BOOTSCRIPT_COPY_RAM
69#endif
Sumit Garg45642832016-06-14 13:52:39 -040070/* The address needs to be modified according to NOR, NAND, SD and
71 * DDR memory map
72 */
Udit Agarwal6b29d232017-01-06 15:58:56 +053073#ifdef CONFIG_FSL_LSCH3
74#define CONFIG_BS_HDR_ADDR_DEVICE 0x580d00000
75#define CONFIG_BS_ADDR_DEVICE 0x580e00000
76#define CONFIG_BS_HDR_ADDR_RAM 0xa0d00000
77#define CONFIG_BS_ADDR_RAM 0xa0e00000
Sumit Garg45642832016-06-14 13:52:39 -040078#define CONFIG_BS_HDR_SIZE 0x00002000
79#define CONFIG_BS_SIZE 0x00001000
Saksham Jain503eab92016-03-23 16:24:37 +053080#else
Sumit Garg45642832016-06-14 13:52:39 -040081#ifdef CONFIG_SD_BOOT
82/* For SD boot address and size are assigned in terms of sector
83 * offset and no. of sectors respectively.
84 */
York Sun342cf062017-03-27 11:41:02 -070085#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
Ruchika Guptad6b89202017-04-17 18:07:17 +053086#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000920
87#else
88#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000900
89#endif
Vinitha Pillai31b11c62017-02-01 18:28:53 +053090#define CONFIG_BS_ADDR_DEVICE 0x00000940
Sumit Garg45642832016-06-14 13:52:39 -040091#define CONFIG_BS_HDR_SIZE 0x00000010
92#define CONFIG_BS_SIZE 0x00000008
Ruchika Guptaba688752017-04-17 18:07:18 +053093#elif defined(CONFIG_NAND_BOOT)
94#define CONFIG_BS_HDR_ADDR_DEVICE 0x00800000
95#define CONFIG_BS_ADDR_DEVICE 0x00802000
96#define CONFIG_BS_HDR_SIZE 0x00002000
97#define CONFIG_BS_SIZE 0x00001000
Vinitha Pillai-B572238a3c6452017-03-23 13:48:16 +053098#elif defined(CONFIG_QSPI_BOOT)
99#ifdef CONFIG_ARCH_LS1046A
100#define CONFIG_BS_HDR_ADDR_DEVICE 0x40780000
101#define CONFIG_BS_ADDR_DEVICE 0x40800000
Vinitha Pillai-B572236cb92e72017-03-23 13:48:19 +0530102#elif defined(CONFIG_ARCH_LS1012A)
103#define CONFIG_BS_HDR_ADDR_DEVICE 0x400c0000
104#define CONFIG_BS_ADDR_DEVICE 0x40060000
Sumit Garg45642832016-06-14 13:52:39 -0400105#else
Vinitha Pillai-B572238a3c6452017-03-23 13:48:16 +0530106#error "Platform not supported"
107#endif
108#define CONFIG_BS_HDR_SIZE 0x00002000
109#define CONFIG_BS_SIZE 0x00001000
110#else /* Default NOR Boot */
Sumit Garg45642832016-06-14 13:52:39 -0400111#define CONFIG_BS_HDR_ADDR_DEVICE 0x600a0000
112#define CONFIG_BS_ADDR_DEVICE 0x60060000
113#define CONFIG_BS_HDR_SIZE 0x00002000
114#define CONFIG_BS_SIZE 0x00001000
Vinitha Pillai-B572238a3c6452017-03-23 13:48:16 +0530115#endif
Sumit Garg45642832016-06-14 13:52:39 -0400116#define CONFIG_BS_HDR_ADDR_RAM 0x81000000
117#define CONFIG_BS_ADDR_RAM 0x81020000
Saksham Jain503eab92016-03-23 16:24:37 +0530118#endif
119
120#ifdef CONFIG_BOOTSCRIPT_COPY_RAM
121#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM
Saksham Jain503eab92016-03-23 16:24:37 +0530122#define CONFIG_BOOTSCRIPT_ADDR CONFIG_BS_ADDR_RAM
Saksham Jain506c2eb2016-03-23 16:24:36 +0530123#else
Sumit Garg45642832016-06-14 13:52:39 -0400124#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_DEVICE
125/* BOOTSCRIPT_ADDR is not required */
Saksham Jain506c2eb2016-03-23 16:24:36 +0530126#endif
gaurav ranaf79323c2015-03-10 14:08:50 +0530127
Sumit Garge0f9e9b2016-09-01 12:56:44 -0400128#ifdef CONFIG_FSL_LS_PPA
Sumit Garge0f9e9b2016-09-01 12:56:44 -0400129/* Define the key hash here if SRK used for signing PPA image is
130 * different from SRK hash put in SFP used for U-Boot.
131 * Example
Vinitha Pillai-B57223a4b3ded2017-03-23 13:48:14 +0530132 * #define PPA_KEY_HASH \
Sumit Garge0f9e9b2016-09-01 12:56:44 -0400133 * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
134 */
Vinitha Pillai-B57223a4b3ded2017-03-23 13:48:14 +0530135#define PPA_KEY_HASH NULL
Sumit Garge0f9e9b2016-09-01 12:56:44 -0400136#endif /* ifdef CONFIG_FSL_LS_PPA */
137
Aneesh Bansal43104702016-01-22 16:37:24 +0530138#include <config_fsl_chain_trust.h>
Sumit Gargbdddd6e2016-06-14 13:52:38 -0400139#endif /* #ifndef CONFIG_SPL_BUILD */
Aneesh Bansal43104702016-01-22 16:37:24 +0530140#endif /* #ifdef CONFIG_CHAIN_OF_TRUST */
gaurav ranaf79323c2015-03-10 14:08:50 +0530141#endif