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git01.mediatek.com / filogic / uboot / 2429d4f99fba7f152fdcc03e5317726debf7bbbd / . / include / asm-blackfin / mach-common / bits / bootrom.h
blob: 6cdaa4f894429b43e0940cebf8ba3f6841b7240c [file] [log] [blame]
Mike Frysinger66c4cf42008-02-04 19:26:55 -0500[diff] [blame]1/*
2 * Boot ROM Entry Points and such
3 */
4
5/* These Blackfins all have a Boot ROM that is not reusable (at all):
6 * BF531 / BF532 / BF533
7 * BF538 / BF539
8 * BF561
9 * So there is nothing for us to export ;(
10 *
11 * These Blackfins started to roll with the idea that the Boot ROM can
12 * provide useful functions, but still only a few (and not really useful):
13 * BF534 / BF536 / BF537
14 *
15 * Looking forward, Boot ROM's on newer Blackfins have quite a few
16 * nice entry points that are usable at runtime and beyond. We'll
17 * only define known legacy parts (listed above) and otherwise just
18 * assume it's a newer part.
19 *
20 * These entry points are accomplished by placing a small jump table at
21 * the start of the Boot ROM. This way the addresses are fixed forever.
22 */
23
24#ifndef __BFIN_PERIPHERAL_BOOTROM__
25#define __BFIN_PERIPHERAL_BOOTROM__
26
27/* All Blackfin's have the Boot ROM entry point at the same address */
28#define _BOOTROM_RESET 0xEF000000
29
30#if defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__) || \
31 defined(__ADSPBF538__) || defined(__ADSPBF539__) || \
32 defined(__ADSPBF561__)
33
34 /* Nothing to export */
35
36#elif defined(__ADSPBF534__) || defined(__ADSPBF536__) || defined(__ADSPBF537__)
37
38 /* The BF537 family */
39
40#define _BOOTROM_FINAL_INIT 0xEF000002
41/* reserved 0xEF000004 */
42#define _BOOTROM_DO_MEMORY_DMA 0xEF000006
43#define _BOOTROM_BOOT_DXE_FLASH 0xEF000008
44#define _BOOTROM_BOOT_DXE_SPI 0xEF00000A
45#define _BOOTROM_BOOT_DXE_TWI 0xEF00000C
46/* reserved 0xEF00000E */
47#define _BOOTROM_GET_DXE_ADDRESS_FLASH 0xEF000010
48#define _BOOTROM_GET_DXE_ADDRESS_SPI 0xEF000012
49#define _BOOTROM_GET_DXE_ADDRESS_TWI 0xEF000014
50/* reserved 0xEF000016 */
51/* reserved 0xEF000018 */
52
53 /* Glue to newer Boot ROMs */
54#define _BOOTROM_MDMA _BOOTROM_DO_MEMORY_DMA
55#define _BOOTROM_MEMBOOT _BOOTROM_BOOT_DXE_FLASH
56#define _BOOTROM_SPIBOOT _BOOTROM_BOOT_DXE_FLASH
57#define _BOOTROM_TWIBOOT _BOOTROM_BOOT_DXE_TWI
58
59#else
60
61 /* All the newer Boot ROMs */
62
63#define _BOOTROM_FINAL_INIT 0xEF000002
64#define _BOOTROM_PDMA 0xEF000004
65#define _BOOTROM_MDMA 0xEF000006
66#define _BOOTROM_MEMBOOT 0xEF000008
67#define _BOOTROM_SPIBOOT 0xEF00000A
68#define _BOOTROM_TWIBOOT 0xEF00000C
69/* reserved 0xEF00000E */
70/* reserved 0xEF000010 */
71/* reserved 0xEF000012 */
72/* reserved 0xEF000014 */
73/* reserved 0xEF000016 */
74#define _BOOTROM_OTP_COMMAND 0xEF000018
75#define _BOOTROM_OTP_READ 0xEF00001A
76#define _BOOTROM_OTP_WRITE 0xEF00001C
77#define _BOOTROM_ECC_TABLE 0xEF00001E
78#define _BOOTROM_BOOTKERNEL 0xEF000020
79#define _BOOTROM_GETPORT 0xEF000022
80#define _BOOTROM_NMI 0xEF000024
81#define _BOOTROM_HWERROR 0xEF000026
82#define _BOOTROM_EXCEPTION 0xEF000028
83#define _BOOTROM_CRC32 0xEF000030
84#define _BOOTROM_CRC32POLY 0xEF000032
85#define _BOOTROM_CRC32CALLBACK 0xEF000034
86#define _BOOTROM_CRC32INITCODE 0xEF000036
87#define _BOOTROM_SYSCONTROL 0xEF000038
88#define _BOOTROM_REV 0xEF000040
89#define _BOOTROM_SESR 0xEF001000
90
91#define BOOTROM_CAPS_ADI_BOOT_STRUCTS 1
92
93/* Not available on initial BF54x or BF52x */
94#if (defined(__ADSPBF54x__) && __SILICON_REVISION__ < 1) || \
95 (defined(__ADSPBF52x__) && __SILICON_REVISION__ < 2)
96#define BOOTROM_CAPS_SYSCONTROL 0
97#else
98#define BOOTROM_CAPS_SYSCONTROL 1
99#endif
100
101#endif
102
103#ifndef BOOTROM_CAPS_ADI_BOOT_STRUCTS
104#define BOOTROM_CAPS_ADI_BOOT_STRUCTS 0
105#endif
106#ifndef BOOTROM_CAPS_SYSCONTROL
107#define BOOTROM_CAPS_SYSCONTROL 0
108#endif
109
110#ifndef __ASSEMBLY__
111
112/* Structures for the syscontrol() function */
113typedef struct ADI_SYSCTRL_VALUES {
114 uint16_t uwVrCtl;
115 uint16_t uwPllCtl;
116 uint16_t uwPllDiv;
117 uint16_t uwPllLockCnt;
118 uint16_t uwPllStat;
119} ADI_SYSCTRL_VALUES;
120
121#ifndef _BOOTROM_SYSCONTROL
122#define _BOOTROM_SYSCONTROL 0
123#endif
124static uint32_t (* const syscontrol)(uint32_t action_flags, ADI_SYSCTRL_VALUES *power_settings, void *reserved) = (void *)_BOOTROM_SYSCONTROL;
125
126#endif /* __ASSEMBLY__ */
127
128/* Possible syscontrol action flags */
129#define SYSCTRL_READ 0x00000000 /* read registers */
130#define SYSCTRL_WRITE 0x00000001 /* write registers */
131#define SYSCTRL_SYSRESET 0x00000002 /* perform system reset */
132#define SYSCTRL_SOFTRESET 0x00000004 /* perform core and system reset */
133#define SYSCTRL_VRCTL 0x00000010 /* read/write VR_CTL register */
134#define SYSCTRL_EXTVOLTAGE 0x00000020 /* VDDINT supplied externally */
135#define SYSCTRL_INTVOLTAGE 0x00000000 /* VDDINT generated by on-chip regulator */
136#define SYSCTRL_OTPVOLTAGE 0x00000040 /* For Factory Purposes Only */
137#define SYSCTRL_PLLCTL 0x00000100 /* read/write PLL_CTL register */
138#define SYSCTRL_PLLDIV 0x00000200 /* read/write PLL_DIV register */
139#define SYSCTRL_LOCKCNT 0x00000400 /* read/write PLL_LOCKCNT register */
140#define SYSCTRL_PLLSTAT 0x00000800 /* read/write PLL_STAT register */
141
142#ifndef __ASSEMBLY__
143
144/* Structures for working with LDRs and boot rom callbacks */
145typedef struct ADI_BOOT_HEADER {
146 int32_t dBlockCode;
147 void *pTargetAddress;
148 int32_t dByteCount;
149 int32_t dArgument;
150} ADI_BOOT_HEADER;
151
152typedef struct ADI_BOOT_BUFFER {
153 void *pSource;
154 int32_t dByteCount;
155} ADI_BOOT_BUFFER;
156
157typedef struct ADI_BOOT_DATA {
158 void *pSource;
159 void *pDestination;
160 int16_t *pControlRegister;
161 int16_t *pDmaControlRegister;
162 int32_t dControlValue;
163 int32_t dByteCount;
164 int32_t dFlags;
165 int16_t uwDataWidth;
166 int16_t uwSrcModifyMult;
167 int16_t uwDstModifyMult;
168 int16_t uwHwait;
169 int16_t uwSsel;
170 int16_t uwUserShort;
171 int32_t dUserLong;
172 int32_t dReserved2;
173 void *pErrorFunction;
174 void *pLoadFunction;
175 void *pCallBackFunction;
176 ADI_BOOT_HEADER *pHeader;
177 void *pTempBuffer;
178 void *pTempCurrent;
179 int32_t dTempByteCount;
180 int32_t dBlockCount;
181 int32_t dClock;
182 void *pLogBuffer;
183 void *pLogCurrent;
184 int32_t dLogByteCount;
185} ADI_BOOT_DATA;
186
187#endif /* __ASSEMBLY__ */
188
189/* Bit defines for ADI_BOOT_DATA->dFlags */
190#define BFLAG_DMACODE_MASK 0x0000000F
191#define BFLAG_SAFE 0x00000010
192#define BFLAG_AUX 0x00000020
193#define BFLAG_FILL 0x00000100
194#define BFLAG_QUICKBOOT 0x00000200
195#define BFLAG_CALLBACK 0x00000400
196#define BFLAG_INIT 0x00000800
197#define BFLAG_IGNORE 0x00001000
198#define BFLAG_INDIRECT 0x00002000
199#define BFLAG_FIRST 0x00004000
200#define BFLAG_FINAL 0x00008000
201#define BFLAG_HOOK 0x00400000
202#define BFLAG_HDRINDIRECT 0x00800000
203#define BFLAG_TYPE_MASK 0x00300000
204#define BFLAG_TYPE_1 0x00000000
205#define BFLAG_TYPE_2 0x00100000
206#define BFLAG_TYPE_3 0x00200000
207#define BFLAG_TYPE_4 0x00300000
208#define BFLAG_FASTREAD 0x00400000
209#define BFLAG_NOAUTO 0x01000000
210#define BFLAG_PERIPHERAL 0x02000000
211#define BFLAG_SLAVE 0x04000000
212#define BFLAG_WAKEUP 0x08000000
213#define BFLAG_NEXTDXE 0x10000000
214#define BFLAG_RETURN 0x20000000
215#define BFLAG_RESET 0x40000000
216#define BFLAG_NONRESTORE 0x80000000
217
218#endif