blob: 2d61dff89c2c03083927472164217b7a448a2915 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +09002/*
3 * Copyright (C) 2010 Samsung Electronics
4 * Minkyu Kang <mk7.kang@samsung.com>
5 * Kyungmin Park <kyungmin.park@samsung.com>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +09006 */
7
8#include <common.h>
Simon Glass5e6201b2019-08-01 09:46:51 -06009#include <env.h>
Simon Glass0f2af882020-05-10 11:40:05 -060010#include <log.h>
Piotr Wilczeke372b552012-10-19 05:34:03 +000011#include <spi.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060012#include <asm/global_data.h>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090013#include <asm/io.h>
Piotr Wilczeke372b552012-10-19 05:34:03 +000014#include <asm/gpio.h>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090015#include <asm/arch/adc.h>
Piotr Wilczek3b179142012-09-20 00:19:59 +000016#include <asm/arch/pinmux.h>
Piotr Wilczek6ce94c32012-09-20 00:20:00 +000017#include <asm/arch/watchdog.h>
Simon Glassdbd79542020-05-10 11:40:11 -060018#include <linux/delay.h>
Łukasz Majewski1c6dba12012-11-13 03:21:55 +000019#include <power/pmic.h>
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +010020#include <usb.h>
Marek Vasutf1be9cb2015-12-04 02:51:20 +010021#include <usb/dwc2_udc.h>
Lukasz Majewskibf731262011-12-15 10:32:12 +010022#include <asm/arch/cpu.h>
Łukasz Majewski1c6dba12012-11-13 03:21:55 +000023#include <power/max8998_pmic.h>
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +010024#include <libtizen.h>
Przemyslaw Marczak94df8012014-01-22 11:24:20 +010025#include <samsung/misc.h>
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +010026#include <usb_mass_storage.h>
Simon Glass0ffb9d62017-05-31 19:47:48 -060027#include <asm/mach-types.h>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090028
29DECLARE_GLOBAL_DATA_PTR;
30
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090031unsigned int board_rev;
Jaehoon Chung40195a22017-01-09 14:47:50 +090032static int init_pmic_lcd(void);
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090033
Tom Rini4cc38852021-08-30 09:16:30 -040034#ifdef CONFIG_REVISION_TAG
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090035u32 get_board_rev(void)
36{
37 return board_rev;
38}
Tom Rini4cc38852021-08-30 09:16:30 -040039#endif
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090040
Jaehoon Chung40195a22017-01-09 14:47:50 +090041int exynos_power_init(void)
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090042{
Jaehoon Chung40195a22017-01-09 14:47:50 +090043 return init_pmic_lcd();
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090044}
45
Jaehoon Chung40195a22017-01-09 14:47:50 +090046static int get_hwrev(void)
Łukasz Majewski11be2832012-11-13 03:22:17 +000047{
Jaehoon Chung40195a22017-01-09 14:47:50 +090048 return board_rev & 0xFF;
Łukasz Majewski11be2832012-11-13 03:22:17 +000049}
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090050
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090051static unsigned short get_adc_value(int channel)
52{
53 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
54 unsigned short ret = 0;
55 unsigned int reg;
56 unsigned int loop = 0;
57
58 writel(channel & 0xF, &adc->adcmux);
59 writel((1 << 14) | (49 << 6), &adc->adccon);
60 writel(1000 & 0xffff, &adc->adcdly);
61 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
62 udelay(10);
63 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
64 udelay(10);
65
66 do {
67 udelay(1);
68 reg = readl(&adc->adccon);
69 } while (!(reg & (1 << 15)) && (loop++ < 1000));
70
71 ret = readl(&adc->adcdat0) & 0xFFF;
72
73 return ret;
74}
75
Łukasz Majewski61f8b402012-03-26 21:53:48 +000076static int adc_power_control(int on)
77{
Jaehoon Chung40195a22017-01-09 14:47:50 +090078 struct udevice *dev;
Łukasz Majewski61f8b402012-03-26 21:53:48 +000079 int ret;
Jaehoon Chung40195a22017-01-09 14:47:50 +090080 u8 reg;
Łukasz Majewski61f8b402012-03-26 21:53:48 +000081
Jaehoon Chung40195a22017-01-09 14:47:50 +090082 ret = pmic_get("max8998-pmic", &dev);
83 if (ret) {
84 puts("Failed to get MAX8998!\n");
85 return ret;
86 }
Łukasz Majewski61f8b402012-03-26 21:53:48 +000087
Jaehoon Chung40195a22017-01-09 14:47:50 +090088 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
89 if (on)
90 reg |= MAX8998_LDO4;
91 else
92 reg &= ~MAX8998_LDO4;
Łukasz Majewski61f8b402012-03-26 21:53:48 +000093
Jaehoon Chung40195a22017-01-09 14:47:50 +090094 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
95 if (ret) {
96 puts("MAX8998 LDO setting error\n");
97 return -EINVAL;
98 }
99
Simon Glass7bbb7d92016-11-23 06:34:40 -0700100 return 0;
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000101}
102
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900103static unsigned int get_hw_revision(void)
104{
105 int hwrev, mode0, mode1;
106
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000107 adc_power_control(1);
108
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900109 mode0 = get_adc_value(1); /* HWREV_MODE0 */
110 mode1 = get_adc_value(2); /* HWREV_MODE1 */
111
112 /*
113 * XXX Always set the default hwrev as the latest board
114 * ADC = (voltage) / 3.3 * 4096
115 */
116 hwrev = 3;
117
118#define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
119 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
120 hwrev = 0x0; /* 0.01V 0.01V */
121 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
122 hwrev = 0x1; /* 610mV 0.01V */
123 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
124 hwrev = 0x2; /* 1.16V 0.01V */
125 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
126 hwrev = 0x3; /* 1.79V 0.01V */
127#undef IS_RANGE
128
129 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
130
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000131 adc_power_control(0);
132
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900133 return hwrev;
134}
135
136static void check_hw_revision(void)
137{
138 int hwrev;
139
140 hwrev = get_hw_revision();
141
142 board_rev |= hwrev;
143}
144
Lukasz Majewskibf731262011-12-15 10:32:12 +0100145#ifdef CONFIG_USB_GADGET
146static int s5pc210_phy_control(int on)
147{
Jaehoon Chung40195a22017-01-09 14:47:50 +0900148 struct udevice *dev;
149 int ret;
150 u8 reg;
Lukasz Majewskibf731262011-12-15 10:32:12 +0100151
Jaehoon Chung40195a22017-01-09 14:47:50 +0900152 ret = pmic_get("max8998-pmic", &dev);
153 if (ret) {
154 puts("Failed to get MAX8998!\n");
155 return ret;
156 }
Lukasz Majewskibf731262011-12-15 10:32:12 +0100157
158 if (on) {
Jaehoon Chung40195a22017-01-09 14:47:50 +0900159 reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
160 reg |= MAX8998_SAFEOUT1;
161 ret |= pmic_reg_write(dev,
162 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
163
164 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
165 reg |= MAX8998_LDO3;
166 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
167
168 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
169 reg |= MAX8998_LDO8;
170 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
Lukasz Majewskibf731262011-12-15 10:32:12 +0100171
172 } else {
Jaehoon Chung40195a22017-01-09 14:47:50 +0900173 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
174 reg &= ~MAX8998_LDO8;
175 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
176
177 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
178 reg &= ~MAX8998_LDO3;
179 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
180
181 reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
182 reg &= ~MAX8998_SAFEOUT1;
183 ret |= pmic_reg_write(dev,
184 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
Lukasz Majewskibf731262011-12-15 10:32:12 +0100185 }
186
187 if (ret) {
188 puts("MAX8998 LDO setting error!\n");
Jaehoon Chung40195a22017-01-09 14:47:50 +0900189 return -EINVAL;
Lukasz Majewskibf731262011-12-15 10:32:12 +0100190 }
Jaehoon Chung40195a22017-01-09 14:47:50 +0900191
Lukasz Majewskibf731262011-12-15 10:32:12 +0100192 return 0;
193}
194
Marek Vasut6939aca2015-12-04 02:23:29 +0100195struct dwc2_plat_otg_data s5pc210_otg_data = {
Lukasz Majewskibf731262011-12-15 10:32:12 +0100196 .phy_control = s5pc210_phy_control,
197 .regs_phy = EXYNOS4_USBPHY_BASE,
198 .regs_otg = EXYNOS4_USBOTG_BASE,
199 .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
200 .usb_flags = PHY0_SLEEP,
201};
202#endif
Piotr Wilczek6ce94c32012-09-20 00:20:00 +0000203
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100204int board_usb_init(int index, enum usb_init_type init)
205{
206 debug("USB_udc_probe\n");
Marek Vasut01b61fa2015-12-04 02:26:33 +0100207 return dwc2_udc_probe(&s5pc210_otg_data);
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100208}
209
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100210int exynos_early_init_f(void)
Piotr Wilczek6ce94c32012-09-20 00:20:00 +0000211{
212 wdt_stop();
213
214 return 0;
215}
Piotr Wilczeke372b552012-10-19 05:34:03 +0000216
Jaehoon Chung40195a22017-01-09 14:47:50 +0900217static int init_pmic_lcd(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000218{
Jaehoon Chung40195a22017-01-09 14:47:50 +0900219 struct udevice *dev;
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000220 unsigned char val;
221 int ret = 0;
222
Jaehoon Chung40195a22017-01-09 14:47:50 +0900223 ret = pmic_get("max8998-pmic", &dev);
224 if (ret) {
225 puts("Failed to get MAX8998 for init_pmic_lcd()!\n");
226 return ret;
227 }
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000228
229 /* LDO7 1.8V */
230 val = 0x02; /* (1800 - 1600) / 100; */
Jaehoon Chung40195a22017-01-09 14:47:50 +0900231 ret |= pmic_reg_write(dev, MAX8998_REG_LDO7, val);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000232
233 /* LDO17 3.0V */
234 val = 0xe; /* (3000 - 1600) / 100; */
Jaehoon Chung40195a22017-01-09 14:47:50 +0900235 ret |= pmic_reg_write(dev, MAX8998_REG_LDO17, val);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000236
237 /* Disable unneeded regulators */
238 /*
239 * ONOFF1
240 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
241 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
242 */
243 val = 0xB9;
Jaehoon Chung40195a22017-01-09 14:47:50 +0900244 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, val);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000245
246 /* ONOFF2
247 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
248 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
249 */
250 val = 0x50;
Jaehoon Chung40195a22017-01-09 14:47:50 +0900251 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, val);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000252
253 /* ONOFF3
254 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
255 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
256 */
257 val = 0x00;
Jaehoon Chung40195a22017-01-09 14:47:50 +0900258 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF3, val);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000259
Jaehoon Chung40195a22017-01-09 14:47:50 +0900260 if (ret) {
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000261 puts("LCD pmic initialisation error!\n");
Jaehoon Chung40195a22017-01-09 14:47:50 +0900262 return -EINVAL;
263 }
264
265 return 0;
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000266}
267
Tom Rini757dc982023-09-21 19:32:48 -0400268void exynos_init(void)
Piotr Wilczeke372b552012-10-19 05:34:03 +0000269{
Piotr Wilczeke372b552012-10-19 05:34:03 +0000270 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100271
272 switch (get_hwrev()) {
273 case 0:
274 /*
275 * Set the low to enable LDO_EN
276 * But when you use the test board for eMMC booting
277 * you should set it HIGH since it removes the inverter
278 */
279 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
Simon Glass4f83d3d2014-10-20 19:48:39 -0600280 gpio_request(EXYNOS4_GPIO_E36, "ldo_en");
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530281 gpio_direction_output(EXYNOS4_GPIO_E36, 0);
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100282 break;
283 default:
284 /*
285 * Default reset state is High and there's no inverter
286 * But set it as HIGH to ensure
287 */
288 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
Simon Glass4f83d3d2014-10-20 19:48:39 -0600289 gpio_request(EXYNOS4_GPIO_E13, "massmemory_en");
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530290 gpio_direction_output(EXYNOS4_GPIO_E13, 1);
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100291 break;
292 }
Piotr Wilczeke372b552012-10-19 05:34:03 +0000293
Piotr Wilczeke372b552012-10-19 05:34:03 +0000294 check_hw_revision();
295 printf("HW Revision:\t0x%x\n", board_rev);
Piotr Wilczeke372b552012-10-19 05:34:03 +0000296}