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git01.mediatek.com / filogic / uboot / 23b37f95066414727001a50fabef30bc76c767d7 / . / configs / sama5d3_xplained_nandflash_defconfig
blob: 2ebba96c23f20390db54ed5af14b255b9ea2d092 [file] [log] [blame]
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]1CONFIG_ARM=y
Adam Fordd36b1022019-08-14 08:29:25 -0500[diff] [blame]2CONFIG_ARCH_CPU_INIT=y
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]3CONFIG_ARCH_AT91=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]4CONFIG_SYS_TEXT_BASE=0x26f00000
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]5CONFIG_TARGET_SAMA5D3_XPLAINED=y
Simon Glass0bdfc3e2016-09-12 23:18:39 -0600[diff] [blame]6CONFIG_SPL_GPIO_SUPPORT=y
Simon Glassf2a89462016-09-12 23:18:41 -0600[diff] [blame]7CONFIG_SPL_LIBCOMMON_SUPPORT=y
Simon Glassb16c92c2016-09-12 23:18:43 -0600[diff] [blame]8CONFIG_SPL_LIBGENERIC_SUPPORT=y
Wenyou Yang9ddd6fc2017-04-14 08:51:45 +0800[diff] [blame]9CONFIG_SYS_MALLOC_F_LEN=0x2000
Tom Rini79f4eea2017-05-01 11:41:11 -0400[diff] [blame]10CONFIG_SPL_SERIAL_SUPPORT=y
Wenyou Yang9ddd6fc2017-04-14 08:51:45 +0800[diff] [blame]11CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]12CONFIG_NR_DRAM_BANKS=1
Tom Rini9bd09622018-04-07 20:27:54 -0400[diff] [blame]13CONFIG_SPL=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]14CONFIG_DEBUG_UART_BOARD_INIT=y
15CONFIG_DEBUG_UART_BASE=0xffffee00
16CONFIG_DEBUG_UART_CLOCK=132000000
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]17CONFIG_DEBUG_UART=y
Adam Ford58dbf862018-02-06 07:58:59 -0600[diff] [blame]18CONFIG_ENV_VARS_UBOOT_CONFIG=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]19CONFIG_FIT=y
Wenyou Yange035ea72017-09-14 11:07:44 +0800[diff] [blame]20CONFIG_NAND_BOOT=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]21CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]22CONFIG_USE_BOOTARGS=y
Eugen Hristev68b37ab2018-04-24 12:00:16 +0300[diff] [blame]23CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]24# CONFIG_DISPLAY_BOARDINFO is not set
Simon Goldschmidtcc4078c2018-09-30 14:31:53 +0200[diff] [blame]25CONFIG_SPL_TEXT_BASE=0x300000
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]26CONFIG_SPL_NAND_SUPPORT=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]27CONFIG_HUSH_PARSER=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]28CONFIG_CMD_BOOTZ=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]29# CONFIG_CMD_FLASH is not set
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]30# CONFIG_CMD_LOADS is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]31CONFIG_CMD_MMC=y
Tom Rini00448d22017-07-28 21:31:42 -0400[diff] [blame]32CONFIG_CMD_NAND=y
33CONFIG_CMD_NAND_TRIMFFS=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]34CONFIG_CMD_USB=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]35CONFIG_CMD_DHCP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]36CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]37CONFIG_CMD_PING=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]38CONFIG_CMD_EXT4=y
39CONFIG_CMD_EXT4_WRITE=y
40CONFIG_CMD_FAT=y
Tom Rini2b62b912018-11-13 19:54:45 -0500[diff] [blame]41CONFIG_CMD_MTDPARTS=y
Heiko Schocher09dbb852016-09-21 07:58:19 +0200[diff] [blame]42CONFIG_CMD_UBI=y
Wenyou Yang9ddd6fc2017-04-14 08:51:45 +0800[diff] [blame]43CONFIG_OF_CONTROL=y
44CONFIG_SPL_OF_CONTROL=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]45CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained"
Wenyou Yang9ddd6fc2017-04-14 08:51:45 +0800[diff] [blame]46CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]47CONFIG_ENV_IS_IN_NAND=y
Wenyou Yang9ddd6fc2017-04-14 08:51:45 +0800[diff] [blame]48CONFIG_DM=y
49CONFIG_SPL_DM=y
50CONFIG_SPL_DM_SEQ_ALIAS=y
51CONFIG_CLK=y
52CONFIG_SPL_CLK=y
53CONFIG_CLK_AT91=y
54CONFIG_AT91_UTMI=y
55CONFIG_AT91_H32MX=y
56CONFIG_DM_GPIO=y
57CONFIG_AT91_GPIO=y
58CONFIG_DM_MMC=y
59CONFIG_GENERIC_ATMEL_MCI=y
Stefan Roese23b37f92019-08-22 12:28:04 +0200[diff] [blame^]60# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
Adam Ford9c519182018-07-08 08:11:07 -0500[diff] [blame]61CONFIG_NAND_ATMEL=y
Derald D. Woods7830fc52018-12-15 01:36:46 -0600[diff] [blame]62CONFIG_PMECC_CAP=4
63CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
Wenyou Yang9ddd6fc2017-04-14 08:51:45 +0800[diff] [blame]64CONFIG_DM_ETH=y
65CONFIG_MACB=y
66CONFIG_PINCTRL=y
67CONFIG_SPL_PINCTRL=y
68CONFIG_PINCTRL_AT91=y
69CONFIG_DM_SERIAL=y
Wenyou Yange46dd152017-04-14 08:51:47 +0800[diff] [blame]70CONFIG_DEBUG_UART_ATMEL=y
Wenyou Yange46dd152017-04-14 08:51:47 +0800[diff] [blame]71CONFIG_DEBUG_UART_ANNOUNCE=y
Wenyou Yang9ddd6fc2017-04-14 08:51:45 +0800[diff] [blame]72CONFIG_ATMEL_USART=y
Wenyou.Yang@microchip.com272167d2017-08-15 17:40:27 +0800[diff] [blame]73CONFIG_TIMER=y
74CONFIG_SPL_TIMER=y
75CONFIG_ATMEL_PIT_TIMER=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]76CONFIG_USB=y
Wenyou Yang9ddd6fc2017-04-14 08:51:45 +0800[diff] [blame]77CONFIG_DM_USB=y
78CONFIG_USB_EHCI_HCD=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]79CONFIG_USB_STORAGE=y
Eugen Hristev8ef7e222018-09-18 10:35:38 +0300[diff] [blame]80CONFIG_W1=y
81CONFIG_W1_GPIO=y
82CONFIG_W1_EEPROM=y
83CONFIG_W1_EEPROM_DS24XXX=y
Tom Rinid8532af2017-06-02 11:03:50 -0400[diff] [blame]84CONFIG_FAT_WRITE=y
Eugen Hristevebd04ad2018-09-18 10:35:49 +0300[diff] [blame]85CONFIG_OF_LIBFDT_OVERLAY=y