Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2003-2007 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
| 5 | * (C) Copyright 2004 |
| 6 | * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com. |
| 7 | * |
| 8 | * (C) Copyright 2004-2005 |
| 9 | * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de |
| 10 | * |
| 11 | * Adapted to U-Boot 1.2 by: |
| 12 | * Bartlomiej Sieka <tur@semihalf.com>: |
| 13 | * - HW ID readout from EEPROM |
| 14 | * - module detection |
| 15 | * Grzegorz Bernacki <gjb@semihalf.com>: |
| 16 | * - run-time SDRAM controller configuration |
| 17 | * - LIBFDT support |
| 18 | * |
Wolfgang Denk | bd8ec7e | 2013-10-07 13:07:26 +0200 | [diff] [blame] | 19 | * SPDX-License-Identifier: GPL-2.0+ |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 20 | */ |
| 21 | |
| 22 | #include <common.h> |
| 23 | #include <mpc5xxx.h> |
| 24 | #include <pci.h> |
| 25 | #include <asm/processor.h> |
| 26 | #include <i2c.h> |
| 27 | #include <linux/ctype.h> |
| 28 | |
| 29 | #ifdef CONFIG_OF_LIBFDT |
| 30 | #include <libfdt.h> |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 31 | #include <fdt_support.h> |
| 32 | #endif /* CONFIG_OF_LIBFDT */ |
| 33 | |
| 34 | |
| 35 | #include "cm5200.h" |
| 36 | #include "fwupdate.h" |
| 37 | |
| 38 | DECLARE_GLOBAL_DATA_PTR; |
| 39 | |
| 40 | static hw_id_t hw_id; |
| 41 | |
| 42 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 43 | #ifndef CONFIG_SYS_RAMBOOT |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 44 | /* |
| 45 | * Helper function to initialize SDRAM controller. |
| 46 | */ |
| 47 | static void sdram_start(int hi_addr, mem_conf_t *mem_conf) |
| 48 | { |
| 49 | long hi_addr_bit = hi_addr ? 0x01000000 : 0; |
| 50 | |
| 51 | /* unlock mode register */ |
| 52 | *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000000 | |
| 53 | hi_addr_bit; |
| 54 | |
| 55 | /* precharge all banks */ |
| 56 | *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000002 | |
| 57 | hi_addr_bit; |
| 58 | |
| 59 | /* auto refresh */ |
| 60 | *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000004 | |
| 61 | hi_addr_bit; |
| 62 | |
| 63 | /* auto refresh, second time */ |
| 64 | *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000004 | |
| 65 | hi_addr_bit; |
| 66 | |
| 67 | /* set mode register */ |
| 68 | *(vu_long *)MPC5XXX_SDRAM_MODE = mem_conf->mode; |
| 69 | |
| 70 | /* normal operation */ |
| 71 | *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | hi_addr_bit; |
| 72 | } |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 73 | #endif /* CONFIG_SYS_RAMBOOT */ |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 74 | |
| 75 | |
| 76 | /* |
| 77 | * Retrieve memory configuration for a given module. board_type is the index |
| 78 | * in hw_id_list[] corresponding to the module we are executing on; we return |
| 79 | * SDRAM controller settings approprate for this module. |
| 80 | */ |
| 81 | static mem_conf_t* get_mem_config(int board_type) |
| 82 | { |
| 83 | switch(board_type){ |
| 84 | case CM1_QA: |
| 85 | return memory_config[0]; |
| 86 | case CM11_QA: |
| 87 | case CMU1_QA: |
| 88 | return memory_config[1]; |
| 89 | default: |
| 90 | printf("ERROR: Unknown module, using a default SDRAM " |
| 91 | "configuration - things may not work!!!.\n"); |
| 92 | return memory_config[0]; |
| 93 | } |
| 94 | } |
| 95 | |
| 96 | |
| 97 | /* |
| 98 | * Initalize SDRAM - configure SDRAM controller, detect memory size. |
| 99 | */ |
Becky Bruce | bd99ae7 | 2008-06-09 16:03:40 -0500 | [diff] [blame] | 100 | phys_size_t initdram(int board_type) |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 101 | { |
| 102 | ulong dramsize = 0; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 103 | #ifndef CONFIG_SYS_RAMBOOT |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 104 | ulong test1, test2; |
| 105 | mem_conf_t *mem_conf; |
| 106 | |
| 107 | mem_conf = get_mem_config(board_type); |
Wolfgang Denk | 3688293 | 2007-08-13 21:57:53 +0200 | [diff] [blame] | 108 | |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 109 | /* configure SDRAM start/end for detection */ |
| 110 | *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */ |
| 111 | |
| 112 | /* setup config registers */ |
| 113 | *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = mem_conf->config1; |
| 114 | *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = mem_conf->config2; |
| 115 | |
| 116 | sdram_start(0, mem_conf); |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 117 | test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000); |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 118 | sdram_start(1, mem_conf); |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 119 | test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000); |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 120 | if (test1 > test2) { |
| 121 | sdram_start(0, mem_conf); |
| 122 | dramsize = test1; |
| 123 | } else |
| 124 | dramsize = test2; |
| 125 | |
| 126 | /* memory smaller than 1MB is impossible */ |
| 127 | if (dramsize < (1 << 20)) |
| 128 | dramsize = 0; |
| 129 | |
| 130 | /* set SDRAM CS0 size according to the amount of RAM found */ |
| 131 | if (dramsize > 0) { |
| 132 | *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + |
| 133 | __builtin_ffs(dramsize >> 20) - 1; |
| 134 | } else |
| 135 | *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 136 | #else /* CONFIG_SYS_RAMBOOT */ |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 137 | /* retrieve size of memory connected to SDRAM CS0 */ |
| 138 | dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF; |
| 139 | if (dramsize >= 0x13) |
| 140 | dramsize = (1 << (dramsize - 0x13)) << 20; |
| 141 | else |
| 142 | dramsize = 0; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 143 | #endif /* !CONFIG_SYS_RAMBOOT */ |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 144 | |
| 145 | /* |
| 146 | * On MPC5200B we need to set the special configuration delay in the |
| 147 | * DDR controller. Refer to chapter 8.7.5 SDelay--MBAR + 0x0190 of |
| 148 | * the MPC5200B User's Manual. |
| 149 | */ |
| 150 | *(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04; |
| 151 | __asm__ volatile ("sync"); |
| 152 | |
| 153 | return dramsize; |
| 154 | } |
| 155 | |
| 156 | |
| 157 | /* |
| 158 | * Read module hardware identification data from the I2C EEPROM. |
| 159 | */ |
| 160 | static void read_hw_id(hw_id_t hw_id) |
| 161 | { |
| 162 | int i; |
| 163 | for (i = 0; i < HW_ID_ELEM_COUNT; ++i) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 164 | if (i2c_read(CONFIG_SYS_I2C_EEPROM, |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 165 | hw_id_format[i].offset, |
| 166 | 2, |
| 167 | (uchar *)&hw_id[i][0], |
| 168 | hw_id_format[i].length) != 0) |
| 169 | printf("ERROR: can't read HW ID from EEPROM\n"); |
| 170 | } |
| 171 | |
| 172 | |
| 173 | /* |
| 174 | * Identify module we are running on, set gd->board_type to the index in |
| 175 | * hw_id_list[] corresponding to the module identifed, or to |
| 176 | * CM5200_UNKNOWN_MODULE if we can't identify the module. |
| 177 | */ |
| 178 | static void identify_module(hw_id_t hw_id) |
| 179 | { |
| 180 | int i, j, element; |
| 181 | char match; |
| 182 | gd->board_type = CM5200_UNKNOWN_MODULE; |
| 183 | for (i = 0; i < sizeof (hw_id_list) / sizeof (char **); ++i) { |
| 184 | match = 1; |
| 185 | for (j = 0; j < sizeof (hw_id_identify) / sizeof (int); ++j) { |
| 186 | element = hw_id_identify[j]; |
| 187 | if (strncmp(hw_id_list[i][element], |
| 188 | &hw_id[element][0], |
| 189 | hw_id_format[element].length) != 0) { |
| 190 | match = 0; |
| 191 | break; |
| 192 | } |
| 193 | } |
| 194 | if (match) { |
| 195 | gd->board_type = i; |
| 196 | break; |
| 197 | } |
| 198 | } |
| 199 | } |
| 200 | |
| 201 | |
| 202 | /* |
| 203 | * Compose string with module name. |
| 204 | * buf is assumed to have enough space, and be null-terminated. |
| 205 | */ |
| 206 | static void compose_module_name(hw_id_t hw_id, char *buf) |
| 207 | { |
| 208 | char tmp[MODULE_NAME_MAXLEN]; |
| 209 | strncat(buf, &hw_id[PCB_NAME][0], hw_id_format[PCB_NAME].length); |
| 210 | strncat(buf, ".", 1); |
| 211 | strncat(buf, &hw_id[FORM][0], hw_id_format[FORM].length); |
| 212 | strncat(buf, &hw_id[VERSION][0], hw_id_format[VERSION].length); |
| 213 | strncat(buf, " (", 2); |
| 214 | strncat(buf, &hw_id[IDENTIFICATION_NUMBER][0], |
| 215 | hw_id_format[IDENTIFICATION_NUMBER].length); |
| 216 | sprintf(tmp, " / %u.%u)", |
| 217 | hw_id[MAJOR_SW_VERSION][0], |
| 218 | hw_id[MINOR_SW_VERSION][0]); |
| 219 | strcat(buf, tmp); |
| 220 | } |
| 221 | |
| 222 | |
| 223 | /* |
| 224 | * Compose string with hostname. |
| 225 | * buf is assumed to have enough space, and be null-terminated. |
| 226 | */ |
| 227 | static void compose_hostname(hw_id_t hw_id, char *buf) |
| 228 | { |
| 229 | char *p; |
| 230 | strncat(buf, &hw_id[PCB_NAME][0], hw_id_format[PCB_NAME].length); |
| 231 | strncat(buf, "_", 1); |
| 232 | strncat(buf, &hw_id[FORM][0], hw_id_format[FORM].length); |
| 233 | strncat(buf, &hw_id[VERSION][0], hw_id_format[VERSION].length); |
| 234 | for (p = buf; *p; ++p) |
| 235 | *p = tolower(*p); |
| 236 | |
| 237 | } |
| 238 | |
| 239 | |
| 240 | #if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) |
| 241 | /* |
| 242 | * Update 'model' and 'memory' properties in the blob according to the module |
| 243 | * that we are running on. |
| 244 | */ |
| 245 | static void ft_blob_update(void *blob, bd_t *bd) |
| 246 | { |
| 247 | int len, ret, nodeoffset = 0; |
| 248 | char module_name[MODULE_NAME_MAXLEN] = {0}; |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 249 | |
| 250 | compose_module_name(hw_id, module_name); |
| 251 | len = strlen(module_name) + 1; |
| 252 | |
| 253 | ret = fdt_setprop(blob, nodeoffset, "model", module_name, len); |
| 254 | if (ret < 0) |
| 255 | printf("ft_blob_update(): cannot set /model property err:%s\n", |
| 256 | fdt_strerror(ret)); |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 257 | } |
| 258 | #endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */ |
| 259 | |
| 260 | |
| 261 | /* |
| 262 | * Read HW ID from I2C EEPROM and detect the modue we are running on. Note |
| 263 | * that we need to use local variable for readout, because global data is not |
| 264 | * writable yet (and we'll have to redo the readout later on). |
| 265 | */ |
| 266 | int checkboard(void) |
| 267 | { |
| 268 | hw_id_t hw_id_tmp; |
| 269 | char module_name_tmp[MODULE_NAME_MAXLEN] = ""; |
| 270 | |
Wolfgang Denk | 3688293 | 2007-08-13 21:57:53 +0200 | [diff] [blame] | 271 | /* |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 272 | * We need I2C to access HW ID data from EEPROM, so we call i2c_init() |
| 273 | * here despite the fact that it will be called again later on. We |
| 274 | * also use a little trick to silence I2C-related output. |
| 275 | */ |
| 276 | gd->flags |= GD_FLG_SILENT; |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 277 | i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 278 | gd->flags &= ~GD_FLG_SILENT; |
| 279 | |
| 280 | read_hw_id(hw_id_tmp); |
| 281 | identify_module(hw_id_tmp); /* this sets gd->board_type */ |
| 282 | compose_module_name(hw_id_tmp, module_name_tmp); |
| 283 | |
| 284 | if (gd->board_type != CM5200_UNKNOWN_MODULE) |
| 285 | printf("Board: %s\n", module_name_tmp); |
| 286 | else |
| 287 | printf("Board: unrecognized cm5200 module (%s)\n", |
| 288 | module_name_tmp); |
Wolfgang Denk | 3688293 | 2007-08-13 21:57:53 +0200 | [diff] [blame] | 289 | |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 290 | return 0; |
| 291 | } |
| 292 | |
| 293 | |
| 294 | int board_early_init_r(void) |
| 295 | { |
| 296 | /* |
| 297 | * Now, when we are in RAM, enable flash write access for detection |
| 298 | * process. Note that CS_BOOT cannot be cleared when executing in |
| 299 | * flash. |
| 300 | */ |
| 301 | *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */ |
| 302 | |
| 303 | /* Now that we can write to global data, read HW ID again. */ |
| 304 | read_hw_id(hw_id); |
| 305 | return 0; |
| 306 | } |
| 307 | |
| 308 | |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 309 | #ifdef CONFIG_MISC_INIT_R |
| 310 | int misc_init_r(void) |
| 311 | { |
Heiko Schocher | 479a4cf | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 312 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT) |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 313 | uchar buf[6]; |
| 314 | char str[18]; |
| 315 | char hostname[MODULE_NAME_MAXLEN]; |
| 316 | |
| 317 | /* Read ethaddr from EEPROM */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 318 | if (i2c_read(CONFIG_SYS_I2C_EEPROM, CONFIG_MAC_OFFSET, 2, buf, 6) == 0) { |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 319 | sprintf(str, "%02X:%02X:%02X:%02X:%02X:%02X", |
| 320 | buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]); |
| 321 | /* Check if MAC addr is owned by Schindler */ |
| 322 | if (strstr(str, "00:06:C3") != str) |
| 323 | printf(LOG_PREFIX "Warning - Illegal MAC address (%s)" |
| 324 | " in EEPROM.\n", str); |
| 325 | else { |
| 326 | printf(LOG_PREFIX "Using MAC (%s) from I2C EEPROM\n", |
| 327 | str); |
| 328 | setenv("ethaddr", str); |
| 329 | } |
| 330 | } else { |
| 331 | printf(LOG_PREFIX "Warning - Unable to read MAC from I2C" |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 332 | " device at address %02X:%04X\n", CONFIG_SYS_I2C_EEPROM, |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 333 | CONFIG_MAC_OFFSET); |
| 334 | } |
Heiko Schocher | 479a4cf | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 335 | #endif /* defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT) */ |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 336 | if (!getenv("ethaddr")) |
| 337 | printf(LOG_PREFIX "MAC address not set, networking is not " |
| 338 | "operational\n"); |
| 339 | |
| 340 | /* set the hostname appropriate to the module we're running on */ |
Bartlomiej Sieka | 1a3bc1c | 2007-10-05 09:46:06 +0200 | [diff] [blame] | 341 | hostname[0] = 0x00; |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 342 | compose_hostname(hw_id, hostname); |
| 343 | setenv("hostname", hostname); |
| 344 | |
| 345 | return 0; |
| 346 | } |
| 347 | #endif /* CONFIG_MISC_INIT_R */ |
| 348 | |
| 349 | |
| 350 | #ifdef CONFIG_LAST_STAGE_INIT |
| 351 | int last_stage_init(void) |
| 352 | { |
| 353 | #ifdef CONFIG_USB_STORAGE |
| 354 | cm5200_fwupdate(); |
| 355 | #endif /* CONFIG_USB_STORAGE */ |
| 356 | return 0; |
| 357 | } |
| 358 | #endif /* CONFIG_LAST_STAGE_INIT */ |
| 359 | |
| 360 | |
| 361 | #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) |
Simon Glass | 2aec3cc | 2014-10-23 18:58:47 -0600 | [diff] [blame] | 362 | int ft_board_setup(void *blob, bd_t *bd) |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 363 | { |
| 364 | ft_cpu_setup(blob, bd); |
| 365 | ft_blob_update(blob, bd); |
Simon Glass | 2aec3cc | 2014-10-23 18:58:47 -0600 | [diff] [blame] | 366 | |
| 367 | return 0; |
Bartlomiej Sieka | a6533c8 | 2007-08-03 12:08:16 +0200 | [diff] [blame] | 368 | } |
| 369 | #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ |