| Tom Warren | c47e717 | 2013-01-28 13:32:07 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify it |
| 5 | * under the terms and conditions of the GNU General Public License, |
| 6 | * version 2, as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 11 | * more details. |
| 12 | * |
| 13 | * You should have received a copy of the GNU General Public License |
| 14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 15 | */ |
| 16 | |
| 17 | #ifndef _TEGRA114_H_ |
| 18 | #define _TEGRA114_H_ |
| 19 | |
| 20 | #define NV_PA_SDRAM_BASE 0x80000000 /* 0x80000000 for real T114 */ |
| Tom Warren | fbef355 | 2013-04-01 15:48:54 -0700 | [diff] [blame] | 21 | #define NV_PA_TSC_BASE 0x700F0000 /* System Counter TSC regs */ |
| Marcel Ziswiler | c5ecf27 | 2014-10-10 23:32:32 +0200 | [diff] [blame] | 22 | #define NV_PA_MC_BASE 0x70019000 |
| Tom Warren | c47e717 | 2013-01-28 13:32:07 +0000 | [diff] [blame] | 23 | |
| 24 | #include <asm/arch-tegra/tegra.h> |
| 25 | |
| 26 | #define BCT_ODMDATA_OFFSET 1752 /* offset to ODMDATA word */ |
| 27 | |
| 28 | #undef NVBOOTINFOTABLE_BCTSIZE |
| 29 | #undef NVBOOTINFOTABLE_BCTPTR |
| 30 | #define NVBOOTINFOTABLE_BCTSIZE 0x48 /* BCT size in BIT in IRAM */ |
| 31 | #define NVBOOTINFOTABLE_BCTPTR 0x4C /* BCT pointer in BIT in IRAM */ |
| 32 | |
| 33 | #define MAX_NUM_CPU 4 |
| 34 | |
| 35 | #endif /* TEGRA114_H */ |