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git01.mediatek.com / filogic / uboot / 2281b0628009cd807e961f8d79e076f407c2afb7 / . / configs / conga-qeval20-qa3-e3845-internal-uart_defconfig
blob: 86390b4abab1d68af3d4c1040c91bf883493922b [file] [log] [blame]
Stefan Roeseb1f21472016-06-15 14:15:25 +0200[diff] [blame]1CONFIG_X86=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]2CONFIG_SYS_TEXT_BASE=0xFFF00000
Stefan Roeseb1f21472016-06-15 14:15:25 +0200[diff] [blame]3CONFIG_VENDOR_CONGATEC=y
4CONFIG_TARGET_CONGA_QEVAL20_QA3_E3845=y
5CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845"
6CONFIG_INTERNAL_UART=y
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]7CONFIG_DEBUG_UART=y
Stefan Roeseb1f21472016-06-15 14:15:25 +0200[diff] [blame]8CONFIG_SMP=y
9CONFIG_HAVE_VGA_BIOS=y
Anatolij Gustschin49477722017-11-17 02:29:59 +0100[diff] [blame]10CONFIG_VGA_BIOS_ADDR=0xfffb0000
Stefan Roeseb1f21472016-06-15 14:15:25 +0200[diff] [blame]11CONFIG_GENERATE_PIRQ_TABLE=y
12CONFIG_GENERATE_MP_TABLE=y
13CONFIG_GENERATE_ACPI_TABLE=y
Stefan Roese927ec422017-10-17 08:09:14 +0200[diff] [blame]14CONFIG_HAVE_ACPI_RESUME=y
Stefan Roeseb1f21472016-06-15 14:15:25 +0200[diff] [blame]15CONFIG_SEABIOS=y
16CONFIG_FIT=y
17CONFIG_FIT_SIGNATURE=y
18CONFIG_BOOTSTAGE=y
19CONFIG_BOOTSTAGE_REPORT=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]20CONFIG_USE_BOOTARGS=y
21CONFIG_BOOTARGS="root=/dev/sda2 ro quiet"
Simon Glassbd5618d2016-10-17 20:13:00 -0600[diff] [blame]22CONFIG_SYS_CONSOLE_INFO_QUIET=y
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]23CONFIG_DISPLAY_BOARDINFO_LATE=y
Mario Six8febc7a2018-03-28 14:38:16 +0200[diff] [blame]24CONFIG_LAST_STAGE_INIT=y
Stefan Roeseb1f21472016-06-15 14:15:25 +0200[diff] [blame]25CONFIG_HUSH_PARSER=y
26CONFIG_CMD_CPU=y
Stefan Roeseb1f21472016-06-15 14:15:25 +0200[diff] [blame]27# CONFIG_CMD_FLASH is not set
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]28CONFIG_CMD_GPIO=y
29CONFIG_CMD_I2C=y
Stefan Roeseb1f21472016-06-15 14:15:25 +0200[diff] [blame]30CONFIG_CMD_MMC=y
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]31CONFIG_CMD_PART=y
Stefan Roeseb1f21472016-06-15 14:15:25 +0200[diff] [blame]32CONFIG_CMD_SF=y
33CONFIG_CMD_SPI=y
34CONFIG_CMD_USB=y
Stefan Roeseb1f21472016-06-15 14:15:25 +0200[diff] [blame]35# CONFIG_CMD_SETEXPR is not set
36CONFIG_CMD_DHCP=y
37# CONFIG_CMD_NFS is not set
38CONFIG_CMD_PING=y
39CONFIG_CMD_TIME=y
40CONFIG_CMD_BOOTSTAGE=y
41CONFIG_CMD_EXT2=y
42CONFIG_CMD_EXT4=y
43CONFIG_CMD_EXT4_WRITE=y
44CONFIG_CMD_FAT=y
45CONFIG_CMD_FS_GENERIC=y
Patrick Delaunayc4bbbec2017-01-27 11:00:36 +0100[diff] [blame]46CONFIG_MAC_PARTITION=y
Patrick Delaunay21d3bce2017-01-27 11:00:38 +0100[diff] [blame]47CONFIG_ISO_PARTITION=y
Patrick Delaunay8a4f2bd2017-01-27 11:00:41 +0100[diff] [blame]48CONFIG_EFI_PARTITION=y
Stefan Roeseb1f21472016-06-15 14:15:25 +0200[diff] [blame]49CONFIG_REGMAP=y
50CONFIG_SYSCON=y
51CONFIG_CPU=y
Tom Riniafea41d2016-09-08 16:11:59 -0400[diff] [blame]52CONFIG_DM_I2C=y
Stefan Roese9a111ce2016-06-28 15:45:13 +0200[diff] [blame]53CONFIG_SYS_I2C_INTEL=y
Stefan Roeseb1f21472016-06-15 14:15:25 +0200[diff] [blame]54CONFIG_WINBOND_W83627=y
Stefan Roeseb1f21472016-06-15 14:15:25 +0200[diff] [blame]55CONFIG_E1000=y
Stefan Roeseb1f21472016-06-15 14:15:25 +0200[diff] [blame]56CONFIG_DEBUG_UART_BASE=0x3f8
57CONFIG_DEBUG_UART_CLOCK=1843200
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]58CONFIG_SPI=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]59CONFIG_USB_STORAGE=y
Simon Glass049f06a2016-10-17 20:13:01 -0600[diff] [blame]60CONFIG_USB_KEYBOARD=y
Stefan Roeseb1f21472016-06-15 14:15:25 +0200[diff] [blame]61CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
62CONFIG_FRAMEBUFFER_VESA_MODE_114=y
Simon Glassd76f29a2016-10-17 20:12:57 -0600[diff] [blame]63CONFIG_CONSOLE_SCROLL_LINES=5