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Ashish Kumar227b4bc2017-08-31 16:12:54 +05301Overview
2--------
3The LS1088A Reference Design (RDB) is a high-performance computing,
4evaluation, and development platform that supports ARM SoC LS1088A and its
5derivatives.
6
7
8LS1088A SoC Overview
9--------------------------------------
10Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc
11
12RDB Default Switch Settings (1: ON; 0: OFF)
13-------------------------------------------
14
15For QSPI Boot
16SW1 0011 0001
17SW2 x100 0000
18SW3 1111 0010
19SW4 1001 0011
20SW5 1111 0000
21
22For SD Boot
23SW1 0010 0000
24SW2 0100 0000
25SW3 1111 0010
26SW4 1001 0011
27SW5 1111 0000
28
29For eMMC Boot
30SW1 0010 0000
31SW2 1100 0000
32SW3 1111 0010
33SW4 1001 0011
34SW5 1111 0000
35
36Alternately you can use this command to switch from QSPI to SD
37
38=> i2c mw 66 0x60 0x20; i2c mw 66 10 10;i2c mw 66 10 21
39
40 LS1088ARDB board Overview
41 -------------------------
42 - SERDES Connections, 16 lanes supporting:
43 - PCI Express - 3.0
44 - SATA 3.0
45 - XFI
46 - QSGMII
47 - DDR Controller
48 - One ports of 72-bits (8-bits ECC, 64-bits DATA) DDR4. Each port supports four
49 chip-selects on one DIMM connector. Support is up to 2133MT/s, Although MAX default
50 with FSL refernce software is 2100MT/s
51 - 2 QSPI-NOR Spansion(S25FS512SDSMFI011) flash of size 64MB
52 - IFC/Local Bus
53 - One 2 GB NAND flash with ECC support, not as boot source
54 - CPLD of size 2K
55 - USB 3.0
56 - Two high speed USB 3.0 ports
57 - First USB 3.0 port configured as Host with Type-A connector
58 - Second USB 3.0 port configured as OTG with micro-AB connector
59 - SDHC/eMMC
60 - SDHC slot and onboard eMMC are muxed together
61 - 4 I2C controllers
62 - Two SATA onboard connectors
63 - 2 UART
64 - JTAG support
65 - QSPI emulator support
66 - TDM riser support