| Ashish Kumar | 227b4bc | 2017-08-31 16:12:54 +0530 | [diff] [blame^] | 1 | Overview |
| 2 | -------- |
| 3 | The LS1088A Reference Design (RDB) is a high-performance computing, |
| 4 | evaluation, and development platform that supports ARM SoC LS1088A and its |
| 5 | derivatives. |
| 6 | |
| 7 | |
| 8 | LS1088A SoC Overview |
| 9 | -------------------------------------- |
| 10 | Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc |
| 11 | |
| 12 | RDB Default Switch Settings (1: ON; 0: OFF) |
| 13 | ------------------------------------------- |
| 14 | |
| 15 | For QSPI Boot |
| 16 | SW1 0011 0001 |
| 17 | SW2 x100 0000 |
| 18 | SW3 1111 0010 |
| 19 | SW4 1001 0011 |
| 20 | SW5 1111 0000 |
| 21 | |
| 22 | For SD Boot |
| 23 | SW1 0010 0000 |
| 24 | SW2 0100 0000 |
| 25 | SW3 1111 0010 |
| 26 | SW4 1001 0011 |
| 27 | SW5 1111 0000 |
| 28 | |
| 29 | For eMMC Boot |
| 30 | SW1 0010 0000 |
| 31 | SW2 1100 0000 |
| 32 | SW3 1111 0010 |
| 33 | SW4 1001 0011 |
| 34 | SW5 1111 0000 |
| 35 | |
| 36 | Alternately you can use this command to switch from QSPI to SD |
| 37 | |
| 38 | => i2c mw 66 0x60 0x20; i2c mw 66 10 10;i2c mw 66 10 21 |
| 39 | |
| 40 | LS1088ARDB board Overview |
| 41 | ------------------------- |
| 42 | - SERDES Connections, 16 lanes supporting: |
| 43 | - PCI Express - 3.0 |
| 44 | - SATA 3.0 |
| 45 | - XFI |
| 46 | - QSGMII |
| 47 | - DDR Controller |
| 48 | - One ports of 72-bits (8-bits ECC, 64-bits DATA) DDR4. Each port supports four |
| 49 | chip-selects on one DIMM connector. Support is up to 2133MT/s, Although MAX default |
| 50 | with FSL refernce software is 2100MT/s |
| 51 | - 2 QSPI-NOR Spansion(S25FS512SDSMFI011) flash of size 64MB |
| 52 | - IFC/Local Bus |
| 53 | - One 2 GB NAND flash with ECC support, not as boot source |
| 54 | - CPLD of size 2K |
| 55 | - USB 3.0 |
| 56 | - Two high speed USB 3.0 ports |
| 57 | - First USB 3.0 port configured as Host with Type-A connector |
| 58 | - Second USB 3.0 port configured as OTG with micro-AB connector |
| 59 | - SDHC/eMMC |
| 60 | - SDHC slot and onboard eMMC are muxed together |
| 61 | - 4 I2C controllers |
| 62 | - Two SATA onboard connectors |
| 63 | - 2 UART |
| 64 | - JTAG support |
| 65 | - QSPI emulator support |
| 66 | - TDM riser support |