blob: 02197ed42530ce31afff2094485c16c433f15f01 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Álvaro Fernández Rojasdbb6baf2018-02-04 21:10:13 +01002/*
3 * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
4 *
5 * Derived from linux/arch/mips/bcm63xx/usb-common.c:
6 * Copyright 2008 Maxime Bizon <mbizon@freebox.fr>
7 * Copyright 2013 Florian Fainelli <florian@openwrt.org>
Álvaro Fernández Rojasdbb6baf2018-02-04 21:10:13 +01008 */
9
10#include <common.h>
11#include <clk.h>
12#include <dm.h>
13#include <generic-phy.h>
14#include <power-domain.h>
15#include <reset.h>
16#include <asm/io.h>
17#include <dm/device.h>
18
19/* USBH PLL Control register */
20#define USBH_PLL_REG 0x18
21#define USBH_PLL_IDDQ_PWRDN BIT(9)
22#define USBH_PLL_PWRDN_DELAY BIT(10)
23
24/* USBH Swap Control register */
25#define USBH_SWAP_REG 0x1c
26#define USBH_SWAP_OHCI_DATA BIT(0)
27#define USBH_SWAP_OHCI_ENDIAN BIT(1)
28#define USBH_SWAP_EHCI_DATA BIT(3)
29#define USBH_SWAP_EHCI_ENDIAN BIT(4)
30
31/* USBH Setup register */
32#define USBH_SETUP_REG 0x28
33#define USBH_SETUP_IOC BIT(4)
34#define USBH_SETUP_IPP BIT(5)
35
36struct bcm6368_usbh_hw {
37 uint32_t setup_clr;
38 uint32_t pll_clr;
39};
40
41struct bcm6368_usbh_priv {
42 const struct bcm6368_usbh_hw *hw;
43 void __iomem *regs;
44};
45
46static int bcm6368_usbh_init(struct phy *phy)
47{
48 struct bcm6368_usbh_priv *priv = dev_get_priv(phy->dev);
49 const struct bcm6368_usbh_hw *hw = priv->hw;
50
51 /* configure to work in native cpu endian */
52 clrsetbits_be32(priv->regs + USBH_SWAP_REG,
53 USBH_SWAP_EHCI_ENDIAN | USBH_SWAP_OHCI_ENDIAN,
54 USBH_SWAP_EHCI_DATA | USBH_SWAP_OHCI_DATA);
55
56 /* setup config */
57 if (hw->setup_clr)
58 clrbits_be32(priv->regs + USBH_SETUP_REG, hw->setup_clr);
59
60 setbits_be32(priv->regs + USBH_SETUP_REG, USBH_SETUP_IOC);
61
62 /* enable pll control */
63 if (hw->pll_clr)
64 clrbits_be32(priv->regs + USBH_PLL_REG, hw->pll_clr);
65
66 return 0;
67}
68
69static struct phy_ops bcm6368_usbh_ops = {
70 .init = bcm6368_usbh_init,
71};
72
73static const struct bcm6368_usbh_hw bcm6328_hw = {
74 .pll_clr = USBH_PLL_IDDQ_PWRDN | USBH_PLL_PWRDN_DELAY,
75 .setup_clr = 0,
76};
77
78static const struct bcm6368_usbh_hw bcm6362_hw = {
79 .pll_clr = 0,
80 .setup_clr = 0,
81};
82
83static const struct bcm6368_usbh_hw bcm6368_hw = {
84 .pll_clr = 0,
85 .setup_clr = 0,
86};
87
88static const struct bcm6368_usbh_hw bcm63268_hw = {
89 .pll_clr = USBH_PLL_IDDQ_PWRDN | USBH_PLL_PWRDN_DELAY,
90 .setup_clr = USBH_SETUP_IPP,
91};
92
93static const struct udevice_id bcm6368_usbh_ids[] = {
94 {
95 .compatible = "brcm,bcm6328-usbh",
96 .data = (ulong)&bcm6328_hw,
97 }, {
98 .compatible = "brcm,bcm6362-usbh",
99 .data = (ulong)&bcm6362_hw,
100 }, {
101 .compatible = "brcm,bcm6368-usbh",
102 .data = (ulong)&bcm6368_hw,
103 }, {
104 .compatible = "brcm,bcm63268-usbh",
105 .data = (ulong)&bcm63268_hw,
106 }, { /* sentinel */ }
107};
108
109static int bcm6368_usbh_probe(struct udevice *dev)
110{
111 struct bcm6368_usbh_priv *priv = dev_get_priv(dev);
112 const struct bcm6368_usbh_hw *hw =
113 (const struct bcm6368_usbh_hw *)dev_get_driver_data(dev);
114#if defined(CONFIG_POWER_DOMAIN)
115 struct power_domain pwr_dom;
116#endif
117 struct reset_ctl rst_ctl;
118 struct clk clk;
119 fdt_addr_t addr;
120 fdt_size_t size;
121 int ret;
122
123 addr = devfdt_get_addr_size_index(dev, 0, &size);
124 if (addr == FDT_ADDR_T_NONE)
125 return -EINVAL;
126
127 priv->regs = ioremap(addr, size);
128 priv->hw = hw;
129
130 /* enable usbh clock */
131 ret = clk_get_by_name(dev, "usbh", &clk);
132 if (ret < 0)
133 return ret;
134
135 ret = clk_enable(&clk);
136 if (ret < 0)
137 return ret;
138
139 ret = clk_free(&clk);
140 if (ret < 0)
141 return ret;
142
143#if defined(CONFIG_POWER_DOMAIN)
144 /* enable power domain */
145 ret = power_domain_get(dev, &pwr_dom);
146 if (ret < 0)
147 return ret;
148
149 ret = power_domain_on(&pwr_dom);
150 if (ret < 0)
151 return ret;
152
153 ret = power_domain_free(&pwr_dom);
154 if (ret < 0)
155 return ret;
156#endif
157
158 /* perform reset */
159 ret = reset_get_by_index(dev, 0, &rst_ctl);
160 if (ret < 0)
161 return ret;
162
163 ret = reset_deassert(&rst_ctl);
164 if (ret < 0)
165 return ret;
166
167 ret = reset_free(&rst_ctl);
168 if (ret < 0)
169 return ret;
170
171 /* enable usb_ref clock */
172 ret = clk_get_by_name(dev, "usb_ref", &clk);
173 if (!ret) {
174 ret = clk_enable(&clk);
175 if (ret < 0)
176 return ret;
177
178 ret = clk_free(&clk);
179 if (ret < 0)
180 return ret;
181 }
182
183 mdelay(100);
184
185 return 0;
186}
187
188U_BOOT_DRIVER(bcm6368_usbh) = {
189 .name = "bcm6368-usbh",
190 .id = UCLASS_PHY,
191 .of_match = bcm6368_usbh_ids,
192 .ops = &bcm6368_usbh_ops,
193 .priv_auto_alloc_size = sizeof(struct bcm6368_usbh_priv),
194 .probe = bcm6368_usbh_probe,
195};