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Thomas Weber276ffbd2012-01-28 09:25:46 +00001/*
2 * (C) Copyright 2006-2008
3 * Texas Instruments.
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
6 *
7 * (C) Copyright 2012
8 * Corscience GmbH & Co. KG
9 * Thomas Weber <weber@corscience.de>
10 *
11 * Configuration settings for the Tricorder board.
12 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +020013 * SPDX-License-Identifier: GPL-2.0+
Thomas Weber276ffbd2012-01-28 09:25:46 +000014 */
15
16#ifndef __CONFIG_H
17#define __CONFIG_H
18
Tom Rini48157342017-01-25 20:42:35 -050019#define CONFIG_MACH_TYPE MACH_TYPE_TRICORDER
Thomas Weber276ffbd2012-01-28 09:25:46 +000020/*
21 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
22 * 64 bytes before this address should be set aside for u-boot.img's
23 * header. That is 0x800FFFC0--0x80100000 should not be used for any
24 * other needs.
25 */
26#define CONFIG_SYS_TEXT_BASE 0x80100000
27
Thomas Weber276ffbd2012-01-28 09:25:46 +000028#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menonfa96c962015-03-09 17:12:04 -050029#include <asm/arch/omap.h>
Thomas Weber276ffbd2012-01-28 09:25:46 +000030
Thomas Weber276ffbd2012-01-28 09:25:46 +000031/* Clock Defines */
32#define V_OSCK 26000000 /* Clock output from T2 */
33#define V_SCLK (V_OSCK >> 1)
34
Thomas Weber276ffbd2012-01-28 09:25:46 +000035#define CONFIG_MISC_INIT_R
36
37#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
38#define CONFIG_SETUP_MEMORY_TAGS
39#define CONFIG_INITRD_TAG
40#define CONFIG_REVISION_TAG
41
Thomas Weber276ffbd2012-01-28 09:25:46 +000042/* Size of malloc() pool */
Bernhard Walle183cbc92012-04-03 00:37:03 +000043#define CONFIG_SYS_MALLOC_LEN (1024*1024)
Thomas Weber276ffbd2012-01-28 09:25:46 +000044
45/* Hardware drivers */
46
47/* NS16550 Configuration */
Thomas Weber276ffbd2012-01-28 09:25:46 +000048#define CONFIG_SYS_NS16550_SERIAL
49#define CONFIG_SYS_NS16550_REG_SIZE (-4)
50#define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
51
52/* select serial console configuration */
53#define CONFIG_CONS_INDEX 3
54#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
55#define CONFIG_SERIAL3 3
Thomas Weber276ffbd2012-01-28 09:25:46 +000056#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
57 115200}
58
Thomas Weber276ffbd2012-01-28 09:25:46 +000059/* I2C */
Heiko Schocherf53f2b82013-10-22 11:03:18 +020060#define CONFIG_SYS_I2C
Heiko Schocherf53f2b82013-10-22 11:03:18 +020061
Andreas Bießmann01a3f532013-09-06 15:04:52 +020062
63/* EEPROM */
Andreas Bießmann01a3f532013-09-06 15:04:52 +020064#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
65#define CONFIG_SYS_EEPROM_BUS_NUM 1
Thomas Weber276ffbd2012-01-28 09:25:46 +000066
67/* TWL4030 */
Thomas Weber276ffbd2012-01-28 09:25:46 +000068#define CONFIG_TWL4030_LED
69
70/* Board NAND Info */
Thomas Weber276ffbd2012-01-28 09:25:46 +000071#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
Thomas Weber276ffbd2012-01-28 09:25:46 +000072
Thomas Weber276ffbd2012-01-28 09:25:46 +000073#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
74 /* to access nand */
75#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
76 /* to access nand at */
77 /* CS0 */
Thomas Weber276ffbd2012-01-28 09:25:46 +000078#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
79 /* devices */
Prabhakar Kushwaha4d2ba172013-10-04 13:47:58 +053080#define CONFIG_SYS_NAND_MAX_OOBFREE 2
81#define CONFIG_SYS_NAND_MAX_ECCPOS 56
Thomas Weber276ffbd2012-01-28 09:25:46 +000082
Thomas Weber276ffbd2012-01-28 09:25:46 +000083/* needed for ubi */
Thomas Weber276ffbd2012-01-28 09:25:46 +000084#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
85#define CONFIG_MTD_PARTITIONS
86
Andreas Bießmannd6f3c152013-09-06 15:04:50 +020087/* Environment information (this is the common part) */
Thomas Weber276ffbd2012-01-28 09:25:46 +000088
Thomas Weber276ffbd2012-01-28 09:25:46 +000089
Andreas Bießmann65c8f2c2013-09-06 15:04:53 +020090/* hang() the board on panic() */
Andreas Bießmann65c8f2c2013-09-06 15:04:53 +020091
Andreas Bießmannd6f3c152013-09-06 15:04:50 +020092/* environment placement (for NAND), is different for FLASHCARD but does not
93 * harm there */
94#define CONFIG_ENV_OFFSET 0x120000 /* env start */
95#define CONFIG_ENV_OFFSET_REDUND 0x2A0000 /* redundant env start */
96#define CONFIG_ENV_SIZE (16 << 10) /* use 16KiB for env */
97#define CONFIG_ENV_RANGE (384 << 10) /* allow badblocks in env */
98
Andreas Bießmann90071f92013-09-06 15:04:48 +020099/* the loadaddr is the same as CONFIG_SYS_LOAD_ADDR, unfortunately the defiend
100 * value can not be used here! */
101#define CONFIG_LOADADDR 0x82000000
102
Andreas Bießmannd6f3c152013-09-06 15:04:50 +0200103#define CONFIG_COMMON_ENV_SETTINGS \
Thomas Weber276ffbd2012-01-28 09:25:46 +0000104 "console=ttyO2,115200n8\0" \
Thomas Weber1dd2f8e2012-02-13 03:16:53 +0000105 "mmcdev=0\0" \
Thomas Weberc9279302013-09-06 15:04:46 +0200106 "vram=3M\0" \
Thomas Weber276ffbd2012-01-28 09:25:46 +0000107 "defaultdisplay=lcd\0" \
Andreas Bießmannd6f3c152013-09-06 15:04:50 +0200108 "kernelopts=mtdoops.mtddev=3\0" \
Tom Rini5ad8e112017-10-22 17:55:07 -0400109 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
110 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
Thomas Weber276ffbd2012-01-28 09:25:46 +0000111 "commonargs=" \
112 "setenv bootargs console=${console} " \
Andreas Bießmannda6087a2013-09-06 15:04:47 +0200113 "${mtdparts} " \
Andreas Bießmannd6f3c152013-09-06 15:04:50 +0200114 "${kernelopts} " \
115 "vt.global_cursor_default=0 " \
Thomas Weber276ffbd2012-01-28 09:25:46 +0000116 "vram=${vram} " \
Andreas Bießmannd6f3c152013-09-06 15:04:50 +0200117 "omapdss.def_disp=${defaultdisplay}\0"
118
119#define CONFIG_BOOTCOMMAND "run autoboot"
120
121/* specific environment settings for different use cases
122 * FLASHCARD: used to run a rdimage from sdcard to program the device
123 * 'NORMAL': used to boot kernel from sdcard, nand, ...
124 *
125 * The main aim for the FLASHCARD skin is to have an embedded environment
126 * which will not be influenced by any data already on the device.
127 */
128#ifdef CONFIG_FLASHCARD
Andreas Bießmannd6f3c152013-09-06 15:04:50 +0200129/* the rdaddr is 16 MiB before the loadaddr */
130#define CONFIG_ENV_RDADDR "rdaddr=0x81000000\0"
131
132#define CONFIG_EXTRA_ENV_SETTINGS \
133 CONFIG_COMMON_ENV_SETTINGS \
134 CONFIG_ENV_RDADDR \
135 "autoboot=" \
Andreas Bießmannd6f3c152013-09-06 15:04:50 +0200136 "run commonargs; " \
137 "setenv bootargs ${bootargs} " \
138 "flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \
139 "rdinit=/sbin/init; " \
140 "mmc dev ${mmcdev}; mmc rescan; " \
141 "fatload mmc ${mmcdev} ${loadaddr} uImage; " \
142 "fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \
143 "bootm ${loadaddr} ${rdaddr}\0"
144
145#else /* CONFIG_FLASHCARD */
146
147#define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */
148
Andreas Bießmannd6f3c152013-09-06 15:04:50 +0200149#define CONFIG_EXTRA_ENV_SETTINGS \
150 CONFIG_COMMON_ENV_SETTINGS \
Thomas Weber276ffbd2012-01-28 09:25:46 +0000151 "mmcargs=" \
152 "run commonargs; " \
153 "setenv bootargs ${bootargs} " \
154 "root=/dev/mmcblk0p2 " \
Andreas Bießmannd6f3c152013-09-06 15:04:50 +0200155 "rootwait " \
156 "rw\0" \
Thomas Weber276ffbd2012-01-28 09:25:46 +0000157 "nandargs=" \
158 "run commonargs; " \
159 "setenv bootargs ${bootargs} " \
Bernhard Walle2dd62f72012-04-03 00:37:04 +0000160 "root=ubi0:root " \
Andreas Bießmannda6087a2013-09-06 15:04:47 +0200161 "ubi.mtd=7 " \
Thomas Weber276ffbd2012-01-28 09:25:46 +0000162 "rootfstype=ubifs " \
Andreas Bießmannd6f3c152013-09-06 15:04:50 +0200163 "ro\0" \
Thomas Weber1dd2f8e2012-02-13 03:16:53 +0000164 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
Thomas Weber276ffbd2012-01-28 09:25:46 +0000165 "bootscript=echo Running bootscript from mmc ...; " \
166 "source ${loadaddr}\0" \
Thomas Weber1dd2f8e2012-02-13 03:16:53 +0000167 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
Thomas Weber276ffbd2012-01-28 09:25:46 +0000168 "mmcboot=echo Booting from mmc ...; " \
169 "run mmcargs; " \
170 "bootm ${loadaddr}\0" \
Andreas Bießmannce19bed2013-09-06 15:04:51 +0200171 "loaduimage_ubi=ubi part ubi; " \
Joe Hershberger108458a2012-11-01 16:54:18 +0000172 "ubifsmount ubi:root; " \
Bernhard Walle2dd62f72012-04-03 00:37:04 +0000173 "ubifsload ${loadaddr} /boot/uImage\0" \
Andreas Bießmann111c7b02013-09-06 15:04:57 +0200174 "loaduimage_nand=nand read ${loadaddr} kernel 0x500000\0" \
Thomas Weber276ffbd2012-01-28 09:25:46 +0000175 "nandboot=echo Booting from nand ...; " \
176 "run nandargs; " \
Andreas Bießmann111c7b02013-09-06 15:04:57 +0200177 "run loaduimage_nand; " \
Thomas Weber276ffbd2012-01-28 09:25:46 +0000178 "bootm ${loadaddr}\0" \
Andrew Bradforde1c7c8a2012-10-01 05:06:52 +0000179 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
Thomas Weber276ffbd2012-01-28 09:25:46 +0000180 "if run loadbootscript; then " \
181 "run bootscript; " \
182 "else " \
183 "if run loaduimage; then " \
184 "run mmcboot; " \
185 "else run nandboot; " \
186 "fi; " \
187 "fi; " \
188 "else run nandboot; fi\0"
189
Andreas Bießmannd6f3c152013-09-06 15:04:50 +0200190#endif /* CONFIG_FLASHCARD */
Thomas Weber276ffbd2012-01-28 09:25:46 +0000191
192/* Miscellaneous configurable options */
193#define CONFIG_SYS_LONGHELP /* undef to save memory */
Andreas Bießmannd6f3c152013-09-06 15:04:50 +0200194#define CONFIG_CMDLINE_EDITING /* enable cmdline history */
Thomas Weber276ffbd2012-01-28 09:25:46 +0000195#define CONFIG_AUTO_COMPLETE
Thomas Weber276ffbd2012-01-28 09:25:46 +0000196#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Thomas Weber276ffbd2012-01-28 09:25:46 +0000197
Thomas Webere2406c12013-09-06 15:04:56 +0200198#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x00000000)
Thomas Weber276ffbd2012-01-28 09:25:46 +0000199#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
Thomas Webere2406c12013-09-06 15:04:56 +0200200 0x07000000) /* 112 MB */
Thomas Weber276ffbd2012-01-28 09:25:46 +0000201
202#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000)
203
204/*
205 * OMAP3 has 12 GP timers, they can be driven by the system clock
206 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
207 * This rate is divided by a local divisor.
208 */
209#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
210#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Thomas Weber276ffbd2012-01-28 09:25:46 +0000211
Thomas Weber276ffbd2012-01-28 09:25:46 +0000212/* Physical Memory Map */
213#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
214#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
Thomas Weber276ffbd2012-01-28 09:25:46 +0000215#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
216
217/* NAND and environment organization */
Thomas Weber276ffbd2012-01-28 09:25:46 +0000218#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
219
Thomas Weber276ffbd2012-01-28 09:25:46 +0000220#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
221#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
222#define CONFIG_SYS_INIT_RAM_SIZE 0x800
223#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
224 CONFIG_SYS_INIT_RAM_SIZE - \
225 GENERATED_GBL_DATA_SIZE)
226
227/* SRAM config */
228#define CONFIG_SYS_SRAM_START 0x40200000
229#define CONFIG_SYS_SRAM_SIZE 0x10000
230
231/* Defines for SPL */
Tom Rini28591df2012-08-13 12:03:19 -0700232#define CONFIG_SPL_FRAMEWORK
Thomas Weber276ffbd2012-01-28 09:25:46 +0000233
Scott Woodc352a0c2012-09-20 19:09:07 -0500234#define CONFIG_SPL_NAND_BASE
235#define CONFIG_SPL_NAND_DRIVERS
236#define CONFIG_SPL_NAND_ECC
Guillaume GARDET602a16c2014-10-15 17:53:11 +0200237#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Paul Kocialkowski341e8cd2014-11-08 23:14:55 +0100238#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
Thomas Weber276ffbd2012-01-28 09:25:46 +0000239
240#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
Tom Rinicfff4aa2016-08-26 13:30:43 -0400241#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
242 CONFIG_SPL_TEXT_BASE)
Thomas Weber276ffbd2012-01-28 09:25:46 +0000243
244#define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
245#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
246
247/* NAND boot config */
248#define CONFIG_SYS_NAND_5_ADDR_CYCLE
249#define CONFIG_SYS_NAND_PAGE_COUNT 64
250#define CONFIG_SYS_NAND_PAGE_SIZE 2048
251#define CONFIG_SYS_NAND_OOBSIZE 64
252#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
253#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
Andreas Bießmann6bf0b1a2014-04-10 12:52:52 +0200254#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
255 13, 14, 16, 17, 18, 19, 20, 21, 22, \
256 23, 24, 25, 26, 27, 28, 30, 31, 32, \
257 33, 34, 35, 36, 37, 38, 39, 40, 41, \
258 42, 44, 45, 46, 47, 48, 49, 50, 51, \
259 52, 53, 54, 55, 56}
Thomas Weber276ffbd2012-01-28 09:25:46 +0000260
261#define CONFIG_SYS_NAND_ECCSIZE 512
Andreas Bießmannbbf8c932013-04-02 06:05:58 +0000262#define CONFIG_SYS_NAND_ECCBYTES 13
pekon gupta3ef49732013-11-18 19:03:01 +0530263#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
Thomas Weber276ffbd2012-01-28 09:25:46 +0000264
Thomas Weber276ffbd2012-01-28 09:25:46 +0000265#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
266
Andreas Bießmannda6087a2013-09-06 15:04:47 +0200267#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
268#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x100000
Thomas Weber276ffbd2012-01-28 09:25:46 +0000269
270#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
271#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
272
Thomas Webere2406c12013-09-06 15:04:56 +0200273#define CONFIG_SYS_ALT_MEMTEST
274#define CONFIG_SYS_MEMTEST_SCRATCH 0x81000000
Thomas Weber276ffbd2012-01-28 09:25:46 +0000275#endif /* __CONFIG_H */