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Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +09001/*
2 * Configuation settings for the Hitachi Solution Engine 7722
3 *
4 * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +09007 */
8
9#ifndef __MS7722SE_H
10#define __MS7722SE_H
11
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090012#define CONFIG_CPU_SH7722 1
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090013
Vladimir Zapolskiy5e72b842016-11-28 00:15:30 +020014#define CONFIG_DISPLAY_BOARDINFO
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090015#undef CONFIG_SHOW_BOOT_PROGRESS
16
17/* SMC9111 */
Ben Warren0fd6aae2009-10-04 22:37:03 -070018#define CONFIG_SMC91111
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090019#define CONFIG_SMC91111_BASE (0xB8000000)
20
21/* MEMORY */
22#define MS7722SE_SDRAM_BASE (0x8C000000)
23#define MS7722SE_FLASH_BASE_1 (0xA0000000)
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090024#define MS7722SE_FLASH_BANK_SIZE (8*1024 * 1024)
25
Nobuhiro Iwamatsuea4a28602011-01-17 21:07:15 +090026#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020027#define CONFIG_SYS_LONGHELP /* undef to save memory */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020028#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020029#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090030
31/* SCIF */
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090032#define CONFIG_CONS_SCIF0 1
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090033
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020034#define CONFIG_SYS_MEMTEST_START (MS7722SE_SDRAM_BASE)
35#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090036
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020037#undef CONFIG_SYS_ALT_MEMTEST /* Enable alternate, more extensive, memory test */
38#undef CONFIG_SYS_MEMTEST_SCRATCH /* Scratch address used by the alternate memory test */
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090039
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020040#undef CONFIG_SYS_LOADS_BAUD_CHANGE /* Enable temporary baudrate change while serial download */
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090041
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020042#define CONFIG_SYS_SDRAM_BASE (MS7722SE_SDRAM_BASE)
43#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* maybe more, but if so u-boot doesn't know about it... */
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090044
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020045#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) /* default load address for scripts ?!? */
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090046
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020047#define CONFIG_SYS_MONITOR_BASE (MS7722SE_FLASH_BASE_1) /* Address of u-boot image
Wolfgang Denka1be4762008-05-20 16:00:29 +020048 in Flash (NOT run time address in SDRAM) ?!? */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020049#define CONFIG_SYS_MONITOR_LEN (128 * 1024) /* */
50#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020051#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090052
53/* FLASH */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020054#define CONFIG_SYS_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +020055#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020056#undef CONFIG_SYS_FLASH_QUIET_TEST
57#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090058
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020059#define CONFIG_SYS_FLASH_BASE (MS7722SE_FLASH_BASE_1) /* Physical start address of Flash memory */
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090060
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020061#define CONFIG_SYS_MAX_FLASH_SECT 150 /* Max number of sectors on each
Wolfgang Denka1be4762008-05-20 16:00:29 +020062 Flash chip */
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090063
64/* if you use all NOR Flash , you change dip-switch. Please see MS7722SE01 Manual. */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020065#define CONFIG_SYS_MAX_FLASH_BANKS 2
66#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * MS7722SE_FLASH_BANK_SIZE), \
67 CONFIG_SYS_FLASH_BASE + (1 * MS7722SE_FLASH_BANK_SIZE), \
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090068 }
69
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020070#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) /* Timeout for Flash erase operations (in ms) */
71#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) /* Timeout for Flash write operations (in ms) */
72#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) /* Timeout for Flash set sector lock bit operations (in ms) */
73#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) /* Timeout for Flash clear lock bit operations (in ms) */
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090074
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020075#undef CONFIG_SYS_FLASH_PROTECTION /* Use hardware flash sectors protection instead of U-Boot software protection */
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090076
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020077#undef CONFIG_SYS_DIRECT_FLASH_TFTP
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090078
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090079#define CONFIG_ENV_OVERWRITE 1
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +020080#define CONFIG_ENV_SECT_SIZE (8 * 1024)
81#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020082#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE))
83#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +020084#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020085#define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090086
87/* Board Clock */
88#define CONFIG_SYS_CLK_FREQ 33333333
Nobuhiro Iwamatsue6984492013-08-21 16:11:21 +090089#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
90#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Jean-Christophe PLAGNIOL-VILLARD32e6acc2009-06-04 12:06:48 +020091#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
Nobuhiro Iwamatsudabcc0e2007-09-23 02:31:13 +090092
93#endif /* __MS7722SE_H */