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Ilya Yanok37651282012-02-07 23:30:22 +00001/*
2 * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
3 *
4 * Based on omap3_evm_config.h
5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Ilya Yanok37651282012-02-07 23:30:22 +00007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12/*
13 * High Level Configuration Options
14 */
Ilya Yanok37651282012-02-07 23:30:22 +000015
Ilya Yanok37651282012-02-07 23:30:22 +000016#define CONFIG_MACH_TYPE MACH_TYPE_MCX
17
Ilya Yanok37651282012-02-07 23:30:22 +000018#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menonfa96c962015-03-09 17:12:04 -050019#include <asm/arch/omap.h>
Ilya Yanok37651282012-02-07 23:30:22 +000020
Ilya Yanok37651282012-02-07 23:30:22 +000021/*
22 * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
23 * and older u-boot.bin with the new U-Boot SPL.
24 */
25#define CONFIG_SYS_TEXT_BASE 0x80008000
26
Ilya Yanok37651282012-02-07 23:30:22 +000027/* Clock Defines */
28#define V_OSCK 26000000 /* Clock output from T2 */
29#define V_SCLK (V_OSCK >> 1)
30
31#define CONFIG_MISC_INIT_R
32
33#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
34#define CONFIG_SETUP_MEMORY_TAGS
35#define CONFIG_INITRD_TAG
36#define CONFIG_REVISION_TAG
37
38/*
39 * Size of malloc() pool
40 */
41#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
42#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
43/*
44 * DDR related
45 */
46#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
47
48/*
49 * Hardware drivers
50 */
51
52/*
53 * NS16550 Configuration
54 */
55#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
56
Ilya Yanok37651282012-02-07 23:30:22 +000057#define CONFIG_SYS_NS16550_SERIAL
58#define CONFIG_SYS_NS16550_REG_SIZE (-4)
59#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
60
61/*
62 * select serial console configuration
63 */
64#define CONFIG_CONS_INDEX 3
65#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
66#define CONFIG_SERIAL3 3 /* UART3 */
67
68/* allow to overwrite serial and ethaddr */
69#define CONFIG_ENV_OVERWRITE
Ilya Yanok37651282012-02-07 23:30:22 +000070#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
71 115200}
Ilya Yanok37651282012-02-07 23:30:22 +000072
73/* EHCI */
Stefano Babic72c72122012-10-16 04:07:04 +000074#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57
Ilya Yanok37651282012-02-07 23:30:22 +000075
76/* commands to include */
Ilya Yanok37651282012-02-07 23:30:22 +000077
Ilya Yanok37651282012-02-07 23:30:22 +000078#define CONFIG_MTD_PARTITIONS
79#define CONFIG_MTD_DEVICE
Ilya Yanok37651282012-02-07 23:30:22 +000080
Heiko Schocherf53f2b82013-10-22 11:03:18 +020081#define CONFIG_SYS_I2C
Ilya Yanok37651282012-02-07 23:30:22 +000082
83/* RTC */
84#define CONFIG_RTC_DS1337
85#define CONFIG_SYS_I2C_RTC_ADDR 0x68
86
Ilya Yanok37651282012-02-07 23:30:22 +000087/*
88 * Board NAND Info.
89 */
90#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
91 /* to access nand */
92#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
93 /* to access */
94 /* nand at CS0 */
95
96#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
97 /* NAND devices */
Ilya Yanok37651282012-02-07 23:30:22 +000098#define CONFIG_JFFS2_NAND
99/* nand device jffs2 lives on */
100#define CONFIG_JFFS2_DEV "nand0"
101/* start of jffs2 partition */
102#define CONFIG_JFFS2_PART_OFFSET 0x680000
103#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */
104
105/* Environment information */
Ilya Yanok37651282012-02-07 23:30:22 +0000106
107#define CONFIG_BOOTFILE "uImage"
108
Stefano Babic97872a82012-06-13 22:34:43 +0000109/* Setup MTD for NAND on the SOM */
Stefano Babic97872a82012-06-13 22:34:43 +0000110
111#define CONFIG_HOSTNAME mcx
Ilya Yanok37651282012-02-07 23:30:22 +0000112#define CONFIG_EXTRA_ENV_SETTINGS \
Stefano Babic97872a82012-06-13 22:34:43 +0000113 "adddbg=setenv bootargs ${bootargs} trace_buf_size=64M\0" \
114 "adddebug=setenv bootargs ${bootargs} earlyprintk=serial\0" \
115 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
116 "addfb=setenv bootargs ${bootargs} vram=6M " \
117 "omapfb.vram=1:2M,2:2M,3:2M omapdss.def_disp=lcd\0" \
118 "addip_sta=setenv bootargs ${bootargs} " \
119 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
120 "${netmask}:${hostname}:eth0:off\0" \
121 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
122 "addip=if test -n ${ipdyn};then run addip_dyn;" \
123 "else run addip_sta;fi\0" \
124 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
125 "addtty=setenv bootargs ${bootargs} " \
126 "console=${consoledev},${baudrate}\0" \
127 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
128 "baudrate=115200\0" \
129 "consoledev=ttyO2\0" \
Anatolij Gustschinc9d1bac2014-10-24 20:13:51 +0200130 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
Stefano Babic97872a82012-06-13 22:34:43 +0000131 "loadaddr=0x82000000\0" \
132 "load=tftp ${loadaddr} ${u-boot}\0" \
133 "load_k=tftp ${loadaddr} ${bootfile}\0" \
134 "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
135 "loadmlo=tftp ${loadaddr} ${mlo}\0" \
Anatolij Gustschinc9d1bac2014-10-24 20:13:51 +0200136 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \
Stefano Babic97872a82012-06-13 22:34:43 +0000137 "mmcargs=root=/dev/mmcblk0p2 rw " \
138 "rootfstype=ext3 rootwait\0" \
139 "mmcboot=echo Booting from mmc ...; " \
140 "run mmcargs; " \
141 "run addip addtty addmtd addfb addeth addmisc;" \
142 "run loaduimage; " \
143 "bootm ${loadaddr}\0" \
144 "net_nfs=run load_k; " \
145 "run nfsargs; " \
146 "run addip addtty addmtd addfb addeth addmisc;" \
147 "bootm ${loadaddr}\0" \
148 "nfsargs=setenv bootargs root=/dev/nfs rw " \
149 "nfsroot=${serverip}:${rootpath}\0" \
Anatolij Gustschinc9d1bac2014-10-24 20:13:51 +0200150 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \
Stefano Babic97872a82012-06-13 22:34:43 +0000151 "uboot_addr=0x80000\0" \
152 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
153 "nand write ${loadaddr} ${uboot_addr} 80000\0" \
154 "updatemlo=nandecc hw;nand erase 0 20000;" \
155 "nand write ${loadaddr} 0 20000\0" \
156 "upd=if run load;then echo Updating u-boot;if run update;" \
157 "then echo U-Boot updated;" \
158 "else echo Error updating u-boot !;" \
159 "echo Board without bootloader !!;" \
160 "fi;" \
161 "else echo U-Boot not downloaded..exiting;fi\0" \
162 "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
163 "bootscript=echo Running bootscript from mmc ...; " \
164 "source ${loadaddr}\0" \
165 "nandargs=setenv bootargs ubi.mtd=7 " \
166 "root=ubi0:rootfs rootfstype=ubifs\0" \
167 "nandboot=echo Booting from nand ...; " \
168 "run nandargs; " \
169 "ubi part nand0,4;" \
170 "ubi readvol ${loadaddr} kernel;" \
Stefano Babiceccb5762012-10-16 04:07:03 +0000171 "run addtty addmtd addfb addeth addmisc;" \
Stefano Babic97872a82012-06-13 22:34:43 +0000172 "bootm ${loadaddr}\0" \
Stefano Babic756a7bf2012-10-20 23:56:07 +0000173 "preboot=ubi part nand0,7;" \
174 "ubi readvol ${loadaddr} splash;" \
175 "bmp display ${loadaddr};" \
176 "gpio set 55\0" \
Stefano Babiceccb5762012-10-16 04:07:03 +0000177 "swupdate_args=setenv bootargs root=/dev/ram " \
178 "quiet loglevel=1 " \
179 "consoleblank=0 ${swupdate_misc}\0" \
Stefano Babic97872a82012-06-13 22:34:43 +0000180 "swupdate=echo Running Sw-Update...;" \
181 "if printenv mtdparts;then echo Starting SwUpdate...; " \
182 "else mtdparts default;fi; " \
183 "ubi part nand0,5;" \
184 "ubi readvol 0x82000000 kernel_recovery;" \
Stefano Babiceccb5762012-10-16 04:07:03 +0000185 "ubi part nand0,6;" \
186 "ubi readvol 0x84000000 fs_recovery;" \
Stefano Babic97872a82012-06-13 22:34:43 +0000187 "run swupdate_args; " \
188 "setenv bootargs ${bootargs} " \
189 "${mtdparts} " \
190 "vram=6M omapfb.vram=1:2M,2:2M,3:2M " \
191 "omapdss.def_disp=lcd;" \
Stefano Babic59a1e782014-02-14 12:51:27 +0100192 "bootm 0x82000000 0x84000000\0" \
193 "bootcmd=mmc rescan;if fatload mmc 0 82000000 loadbootscr.scr;" \
194 "then source 82000000;else run nandboot;fi\0"
Ilya Yanok37651282012-02-07 23:30:22 +0000195
196#define CONFIG_AUTO_COMPLETE
Detlev Zundeld1c609f2012-02-08 04:49:02 +0000197#define CONFIG_CMDLINE_EDITING
198
Ilya Yanok37651282012-02-07 23:30:22 +0000199/*
200 * Miscellaneous configurable options
201 */
Ilya Yanok37651282012-02-07 23:30:22 +0000202#define CONFIG_SYS_LONGHELP /* undef to save memory */
Stefano Babicbdb00c22012-06-13 22:34:41 +0000203#define CONFIG_SYS_CBSIZE 1024/* Console I/O Buffer Size */
Ilya Yanok37651282012-02-07 23:30:22 +0000204/* Boot Argument Buffer Size */
205#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
206/* memtest works on */
207#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
208#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
209 0x01F00000) /* 31MB */
210
211#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
212 /* address */
Stefano Babic756a7bf2012-10-20 23:56:07 +0000213#define CONFIG_PREBOOT
Ilya Yanok37651282012-02-07 23:30:22 +0000214
215/*
216 * AM3517 has 12 GP timers, they can be driven by the system clock
217 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
218 * This rate is divided by a local divisor.
219 */
220#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
221#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Ilya Yanok37651282012-02-07 23:30:22 +0000222
223/*
Ilya Yanok37651282012-02-07 23:30:22 +0000224 * Physical Memory Map
225 */
226#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
227#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
Ilya Yanok37651282012-02-07 23:30:22 +0000228#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
229
230/*
231 * FLASH and environment organization
232 */
233
234/* **** PISMO SUPPORT *** */
Ilya Yanok37651282012-02-07 23:30:22 +0000235
Stefano Babic97872a82012-06-13 22:34:43 +0000236/* Redundant Environment */
Ilya Yanok37651282012-02-07 23:30:22 +0000237#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
Adam Ford6b1c1652017-09-04 21:08:02 -0500238#define CONFIG_ENV_OFFSET 0x180000
239#define CONFIG_ENV_ADDR 0x180000
Stefano Babic97872a82012-06-13 22:34:43 +0000240#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
241 2 * CONFIG_SYS_ENV_SECT_SIZE)
242#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
Ilya Yanok37651282012-02-07 23:30:22 +0000243
244/* Flash banks JFFS2 should use */
245#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
246 CONFIG_SYS_MAX_NAND_DEVICE)
247#define CONFIG_SYS_JFFS2_MEM_NAND
248/* use flash_info[2] */
249#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
250#define CONFIG_SYS_JFFS2_NUM_BANKS 1
251
252#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
253#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
254#define CONFIG_SYS_INIT_RAM_SIZE 0x800
255#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
256 CONFIG_SYS_INIT_RAM_SIZE - \
257 GENERATED_GBL_DATA_SIZE)
258
259/* Defines for SPL */
Tom Rini28591df2012-08-13 12:03:19 -0700260#define CONFIG_SPL_FRAMEWORK
Ilya Yanok37651282012-02-07 23:30:22 +0000261
Scott Woodc352a0c2012-09-20 19:09:07 -0500262#define CONFIG_SPL_NAND_BASE
263#define CONFIG_SPL_NAND_DRIVERS
264#define CONFIG_SPL_NAND_ECC
Ilya Yanok37651282012-02-07 23:30:22 +0000265
266#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
Tom Rinie33b7052012-05-08 07:29:31 +0000267#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
Ilya Yanok37651282012-02-07 23:30:22 +0000268#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
269
270/* move malloc and bss high to prevent clashing with the main image */
271#define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
272#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
273#define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
274#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
275
Paul Kocialkowski341e8cd2014-11-08 23:14:55 +0100276#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
Guillaume GARDET602a16c2014-10-15 17:53:11 +0200277#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Ilya Yanok37651282012-02-07 23:30:22 +0000278
279/* NAND boot config */
280#define CONFIG_SYS_NAND_PAGE_COUNT 64
281#define CONFIG_SYS_NAND_PAGE_SIZE 2048
282#define CONFIG_SYS_NAND_OOBSIZE 64
283#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
284#define CONFIG_SYS_NAND_5_ADDR_CYCLE
285#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
286#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
287 48, 49, 50, 51, 52, 53, 54, 55,\
288 56, 57, 58, 59, 60, 61, 62, 63}
289#define CONFIG_SYS_NAND_ECCSIZE 256
290#define CONFIG_SYS_NAND_ECCBYTES 3
pekon gupta3ef49732013-11-18 19:03:01 +0530291#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
Stefano Babicd6cfac42014-02-14 12:51:25 +0100292#define CONFIG_SPL_NAND_SOFTECC
Ilya Yanok37651282012-02-07 23:30:22 +0000293
Ilya Yanok37651282012-02-07 23:30:22 +0000294#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
295
296#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
297
298/*
299 * ethernet support
300 *
301 */
302#if defined(CONFIG_CMD_NET)
303#define CONFIG_DRIVER_TI_EMAC
304#define CONFIG_DRIVER_TI_EMAC_USE_RMII
305#define CONFIG_MII
Ilya Yanok37651282012-02-07 23:30:22 +0000306#define CONFIG_BOOTP_DNS
307#define CONFIG_BOOTP_DNS2
308#define CONFIG_BOOTP_SEND_HOSTNAME
309#define CONFIG_NET_RETRY_COUNT 10
310#endif
311
Stefano Babic756a7bf2012-10-20 23:56:07 +0000312#define CONFIG_SPLASH_SCREEN
313#define CONFIG_VIDEO_BMP_RLE8
Stefano Babic756a7bf2012-10-20 23:56:07 +0000314#define CONFIG_VIDEO_OMAP3
Stefano Babic756a7bf2012-10-20 23:56:07 +0000315
Ilya Yanok37651282012-02-07 23:30:22 +0000316#endif /* __CONFIG_H */