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Marek Vasutbcd861b2016-11-16 17:20:23 +01001/*
2 * Specialty padding for the Altera SoCFPGA preloader image
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef __BOOT0_H
8#define __BOOT0_H
9
Philipp Tomsich85bd93d2017-10-10 16:21:07 +020010_start:
11 ARM_VECTORS
12
Marek Vasutbcd861b2016-11-16 17:20:23 +010013#ifdef CONFIG_SPL_BUILD
Chee, Tien Fong19869ea2017-03-29 11:49:16 +080014 .balignl 64,0xf33db33f;
15
16 .word 0x1337c0d3; /* SoCFPGA preloader validation word */
17 .word 0xc01df00d; /* Version, flags, length */
18 .word 0xcafec0d3; /* Checksum, zero-pad */
Marek Vasutbcd861b2016-11-16 17:20:23 +010019 nop;
Marek Vasutbcd861b2016-11-16 17:20:23 +010020
Chee, Tien Fong19869ea2017-03-29 11:49:16 +080021 b reset; /* SoCFPGA jumps here */
22 nop;
23 nop;
24 nop;
25#endif
Marek Vasutbcd861b2016-11-16 17:20:23 +010026
27#endif /* __BOOT0_H */