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Ashish Kumar1ef4c772017-08-31 16:12:55 +05301/*
2 * NXP ls1088a QDS board device tree source
3 *
4 * Copyright 2017 NXP
5 *
Pankaj Bansal45254cf2018-01-18 09:43:33 +05306 * SPDX-License-Identifier: GPL-2.0+ X11
Ashish Kumar1ef4c772017-08-31 16:12:55 +05307 */
8
9/dts-v1/;
10
11#include "fsl-ls1088a.dtsi"
12
13/ {
14 model = "NXP Layerscape 1088a QDS Board";
15 compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
16 aliases {
17 spi0 = &qspi;
18 spi1 = &dspi;
19 };
20};
21
22&dspi {
23 bus-num = <0>;
24 status = "okay";
25
26 dflash0: n25q128a {
27 #address-cells = <1>;
28 #size-cells = <1>;
29 compatible = "spi-flash";
30 reg = <0>;
31 spi-max-frequency = <1000000>; /* input clock */
32 };
33
34 dflash1: sst25wf040b {
35 #address-cells = <1>;
36 #size-cells = <1>;
37 compatible = "spi-flash";
38 spi-max-frequency = <3500000>;
39 reg = <1>;
40 };
41
42 dflash2: en25s64 {
43 #address-cells = <1>;
44 #size-cells = <1>;
45 compatible = "spi-flash";
46 spi-max-frequency = <3500000>;
47 reg = <2>;
48 };
49};
50
51&qspi {
52 bus-num = <0>;
53 status = "okay";
54
55 qflash0: s25fs512s@0 {
56 #address-cells = <1>;
57 #size-cells = <1>;
58 compatible = "spi-flash";
59 spi-max-frequency = <50000000>;
60 reg = <0>;
61 };
62
63 qflash1: s25fs512s@1 {
64 #address-cells = <1>;
65 #size-cells = <1>;
66 compatible = "spi-flash";
67 spi-max-frequency = <50000000>;
68 reg = <1>;
69 };
70};