Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Simon Glass | 14e27ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2013 Samsung Electronics |
| 4 | * |
| 5 | * Common configuration settings for the SAMSUNG EXYNOS boards. |
Simon Glass | 14e27ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __EXYNOS_COMMON_H |
| 9 | #define __EXYNOS_COMMON_H |
| 10 | |
| 11 | /* High Level Configuration Options */ |
| 12 | #define CONFIG_SAMSUNG /* in a SAMSUNG core */ |
| 13 | #define CONFIG_S5P /* S5P Family */ |
| 14 | |
| 15 | #include <asm/arch/cpu.h> /* get chip and board defs */ |
| 16 | #include <linux/sizes.h> |
| 17 | |
Simon Glass | 14e27ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 18 | #define CONFIG_ARCH_CPU_INIT |
Simon Glass | 14e27ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 19 | #define CONFIG_SKIP_LOWLEVEL_INIT |
Simon Glass | 14e27ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 20 | |
Simon Glass | 14e27ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 21 | /* Keep L2 Cache Disabled */ |
Simon Glass | 14e27ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 22 | |
| 23 | /* input clock of PLL: 24MHz input clock */ |
| 24 | #define CONFIG_SYS_CLK_FREQ 24000000 |
Andre Przywara | 70c7893 | 2017-02-16 01:20:19 +0000 | [diff] [blame] | 25 | #define COUNTER_FREQUENCY CONFIG_SYS_CLK_FREQ |
Simon Glass | 14e27ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 26 | |
| 27 | #define CONFIG_SETUP_MEMORY_TAGS |
| 28 | #define CONFIG_CMDLINE_TAG |
| 29 | #define CONFIG_INITRD_TAG |
Simon Glass | 14e27ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 30 | #define CONFIG_ENV_OVERWRITE |
| 31 | |
Simon Glass | 86f0bce | 2014-10-07 22:01:52 -0600 | [diff] [blame] | 32 | /* Size of malloc() pool before and after relocation */ |
Simon Glass | 86f0bce | 2014-10-07 22:01:52 -0600 | [diff] [blame] | 33 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20)) |
Simon Glass | 14e27ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 34 | |
| 35 | /* select serial console configuration */ |
Simon Glass | 14e27ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 36 | |
Simon Glass | 14e27ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 37 | /* PWM */ |
| 38 | #define CONFIG_PWM |
| 39 | |
Simon Glass | 14e27ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 40 | /* Miscellaneous configurable options */ |
Ian Campbell | af36fc3 | 2014-11-09 10:44:33 +0000 | [diff] [blame] | 41 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
| 42 | #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ |
Simon Glass | 14e27ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 43 | |
| 44 | /* Boot Argument Buffer Size */ |
| 45 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| 46 | |
Simon Glass | 14e27ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 47 | #endif /* __CONFIG_H */ |