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Graeme Russ0c8c62e2008-12-07 10:29:01 +11001/*
Graeme Russ77290ee2009-02-24 21:13:40 +11002 * (C) Copyright 2009
Graeme Russ0c8c62e2008-12-07 10:29:01 +11003 * Graeme Russ, graeme.russ@gmail.com
4 *
Graeme Russ77290ee2009-02-24 21:13:40 +11005 * (C) Copyright 2002
Albert ARIBAUD60fbc8d2011-08-04 18:45:45 +02006 * Daniel Engström, Omicron Ceti AB, daniel@omicron.se
Graeme Russ77290ee2009-02-24 21:13:40 +11007 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Graeme Russ0c8c62e2008-12-07 10:29:01 +11009 */
10
11#ifndef __ASM_INTERRUPT_H_
12#define __ASM_INTERRUPT_H_ 1
13
Graeme Russ43261532010-10-07 20:03:23 +110014#include <asm/types.h>
15
Graeme Russcbfce1d2011-04-13 19:43:28 +100016/* arch/x86/cpu/interrupts.c */
Graeme Russ77290ee2009-02-24 21:13:40 +110017void set_vector(u8 intnum, void *routine);
18
Graeme Russ77290ee2009-02-24 21:13:40 +110019/* Architecture specific functions */
20void mask_irq(int irq);
21void unmask_irq(int irq);
22void specific_eoi(int irq);
23
24extern char exception_stack[];
25
Simon Glass0e9c6332014-11-14 18:18:31 -070026/**
27 * configure_irq_trigger() - Configure IRQ triggering
28 *
29 * Switch the given interrupt to be level / edge triggered
30 *
31 * @param int_num legacy interrupt number (3-7, 9-15)
32 * @param is_level_triggered true for level triggered interrupt, false for
33 * edge triggered interrupt
34 */
35void configure_irq_trigger(int int_num, bool is_level_triggered);
36
Simon Glass98d7e982015-04-28 20:25:16 -060037void *x86_get_idt(void);
38
Graeme Russ0c8c62e2008-12-07 10:29:01 +110039#endif