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John Rigby25a33622011-04-19 10:42:42 +00001/*
2 * Copyright (C) 2009 ST-Ericsson SA
3 *
4 * Copied from the Linux version:
5 * Author: Kumar Sanghvi <kumar.sanghvi@stericsson.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21#ifndef __MACH_PRCMU_FW_V1_H
22#define __MACH_PRCMU_FW_V1_H
23
24#define AP_EXECUTE 2
25#define I2CREAD 1
26#define I2C_WR_OK 1
27#define I2C_RD_OK 2
28#define I2CWRITE 0
29
Mathieu J. Poirier65798982012-07-31 08:59:25 +000030#define PRCMU_BASE U8500_PRCMU_BASE
Mathieu J. Poiriera9b226c2012-07-31 08:59:27 +000031#define PRCMU_BASE_TCDM U8500_PRCMU_TCDM_BASE
Mathieu J. Poirier65798982012-07-31 08:59:25 +000032#define PRCM_UARTCLK_MGT_REG (PRCMU_BASE + 0x018)
33#define PRCM_MSPCLK_MGT_REG (PRCMU_BASE + 0x01C)
34#define PRCM_I2CCLK_MGT_REG (PRCMU_BASE + 0x020)
35#define PRCM_SDMMCCLK_MGT_REG (PRCMU_BASE + 0x024)
36#define PRCM_PER1CLK_MGT_REG (PRCMU_BASE + 0x02C)
37#define PRCM_PER2CLK_MGT_REG (PRCMU_BASE + 0x030)
38#define PRCM_PER3CLK_MGT_REG (PRCMU_BASE + 0x034)
39#define PRCM_PER5CLK_MGT_REG (PRCMU_BASE + 0x038)
40#define PRCM_PER6CLK_MGT_REG (PRCMU_BASE + 0x03C)
41#define PRCM_PER7CLK_MGT_REG (PRCMU_BASE + 0x040)
Mathieu J. Poiriera9b226c2012-07-31 08:59:27 +000042#define PRCM_MBOX_CPU_VAL (PRCMU_BASE + 0x0FC)
43#define PRCM_MBOX_CPU_SET (PRCMU_BASE + 0x100)
John Rigby25a33622011-04-19 10:42:42 +000044
Mathieu J. Poirier65798982012-07-31 08:59:25 +000045#define PRCM_ARM_IT1_CLEAR (PRCMU_BASE + 0x48C)
Mathieu J. Poiriera9b226c2012-07-31 08:59:27 +000046#define PRCM_ARM_IT1_VAL (PRCMU_BASE + 0x494)
Mathieu J. Poirier65798982012-07-31 08:59:25 +000047#define PRCM_TCR (PRCMU_BASE + 0x1C8)
Mathieu J. Poiriera9b226c2012-07-31 08:59:27 +000048#define PRCM_REQ_MB5 (PRCMU_BASE_TCDM + 0xE44)
49#define PRCM_ACK_MB5 (PRCMU_BASE_TCDM + 0xDF4)
50#define PRCM_XP70_CUR_PWR_STATE (PRCMU_BASE_TCDM + 0xFFC)
John Rigby25a33622011-04-19 10:42:42 +000051/* Mailbox 5 Requests */
52#define PRCM_REQ_MB5_I2COPTYPE_REG (PRCM_REQ_MB5 + 0x0)
53#define PRCM_REQ_MB5_BIT_FIELDS (PRCM_REQ_MB5 + 0x1)
54#define PRCM_REQ_MB5_I2CSLAVE (PRCM_REQ_MB5 + 0x2)
55#define PRCM_REQ_MB5_I2CVAL (PRCM_REQ_MB5 + 0x3)
56
57/* Mailbox 5 ACKs */
58#define PRCM_ACK_MB5_STATUS (PRCM_ACK_MB5 + 0x1)
59#define PRCM_ACK_MB5_SLAVE (PRCM_ACK_MB5 + 0x2)
60#define PRCM_ACK_MB5_VAL (PRCM_ACK_MB5 + 0x3)
61
62#define LOW_POWER_WAKEUP 1
63#define EXE_WAKEUP 0
64
65#define REQ_MB5 5
66
Mathieu J. Poiriercc1bb792012-07-31 08:59:28 +000067#define ab8500_read prcmu_i2c_read
68#define ab8500_write prcmu_i2c_write
69
70int prcmu_i2c_read(u8 reg, u16 slave);
71int prcmu_i2c_write(u8 reg, u16 slave, u8 reg_data);
John Rigby25a33622011-04-19 10:42:42 +000072
Mathieu J. Poirier65798982012-07-31 08:59:25 +000073void u8500_prcmu_enable(u32 *reg);
74void db8500_prcmu_init(void);
75
John Rigby25a33622011-04-19 10:42:42 +000076#endif /* __MACH_PRCMU_FW_V1_H */