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Nicolas Ferre8ba10c72019-08-08 07:48:26 +00001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * at91-sama5d27_wlsom1_ek.dts - Device Tree file for SAMA5D27 WLSOM1 EK
4 *
5 * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries
6 *
7 * Author: Nicolas Ferre <nicolas.ferre@microcihp.com>
8 */
9/dts-v1/;
Eugen Hristev87a31d72021-06-23 16:13:35 +030010#include <dt-bindings/gpio/gpio.h>
Nicolas Ferre8ba10c72019-08-08 07:48:26 +000011#include "sama5d27_wlsom1.dtsi"
12
13/ {
14 model = "Microchip SAMA5D27 WLSOM1 EK";
15 compatible = "microchip,sama5d27-wlsom1-ek", "microchip,sama5d27-wlsom1", "atmel,sama5d2", "atmel,sama5";
16
17 chosen {
18 stdout-path = &uart0;
19 };
20
21 onewire_tm: onewire {
Eugen Hristev87a31d72021-06-23 16:13:35 +030022 gpios = <&pioA PIN_PC9 GPIO_ACTIVE_HIGH>;
Nicolas Ferre8ba10c72019-08-08 07:48:26 +000023 pinctrl-names = "default";
24 pinctrl-0 = <&pinctrl_onewire_tm_default>;
25 status = "okay";
26
27 w1_eeprom: w1_eeprom@0 {
28 compatible = "maxim,ds24b33";
29 status = "okay";
30 };
31 };
32
33 ahb {
34 sdmmc0: sdio-host@a0000000 {
35 bus-width = <4>;
36 pinctrl-names = "default";
37 pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>;
38 status = "okay";
39 };
40
41 apb {
Eugen Hristevd3446a42019-08-26 11:45:06 +000042 hlcdc: hlcdc@f0000000 {
43 atmel,vl-bpix = <4>;
44 atmel,output-mode = <24>;
45 atmel,guard-time = <1>;
46 pinctrl-names = "default";
47 pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>;
48 status = "okay";
49
50 display-timings {
51 800x480 {
52 clock-frequency = <33300000>;
53 xres = <800>;
54 yres = <480>;
55 hactive = <800>;
56 vactive = <480>;
57 hsync-len = <64>;
58 hfront-porch = <1>;
59 hback-porch = <64>;
60 vfront-porch = <1>;
61 vback-porch = <22>;
62 vsync-len = <23>;
63 };
64 };
65 };
66
Eugen Hristev4fcc9932019-08-26 06:47:06 +000067 qspi1: spi@f0024000 {
68 status = "okay";
69 };
70
Nicolas Ferre8ba10c72019-08-08 07:48:26 +000071 macb0: ethernet@f8008000 {
72 status = "okay";
73 };
74
75 uart0: serial@f801c000 {
76 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_uart0_default>;
78 status = "okay";
79 };
80
81 pioA: gpio@fc038000 {
82 pinctrl {
Eugen Hristevd3446a42019-08-26 11:45:06 +000083 pinctrl_lcd_base: pinctrl_lcd_base {
84 pinmux = <PIN_PC30__LCDVSYNC>,
85 <PIN_PC31__LCDHSYNC>,
86 <PIN_PD1__LCDDEN>,
87 <PIN_PD0__LCDPCK>;
88 bias-disable;
89 };
90
91 pinctrl_lcd_pwm: pinctrl_lcd_pwm {
92 pinmux = <PIN_PC28__LCDPWM>;
93 bias-disable;
94 };
95
96 pinctrl_lcd_rgb666: pinctrl_lcd_rgb666 {
97 pinmux = <PIN_PC10__LCDDAT2>,
98 <PIN_PC11__LCDDAT3>,
99 <PIN_PC12__LCDDAT4>,
100 <PIN_PC13__LCDDAT5>,
101 <PIN_PC14__LCDDAT6>,
102 <PIN_PC15__LCDDAT7>,
103 <PIN_PC16__LCDDAT10>,
104 <PIN_PC17__LCDDAT11>,
105 <PIN_PC18__LCDDAT12>,
106 <PIN_PC19__LCDDAT13>,
107 <PIN_PC20__LCDDAT14>,
108 <PIN_PC21__LCDDAT15>,
109 <PIN_PC22__LCDDAT18>,
110 <PIN_PC23__LCDDAT19>,
111 <PIN_PC24__LCDDAT20>,
112 <PIN_PC25__LCDDAT21>,
113 <PIN_PC26__LCDDAT22>,
114 <PIN_PC27__LCDDAT23>;
115 bias-disable;
116 };
117
Nicolas Ferre8ba10c72019-08-08 07:48:26 +0000118 pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default {
119 pinmux = <PIN_PA1__SDMMC0_CMD>,
120 <PIN_PA2__SDMMC0_DAT0>,
121 <PIN_PA3__SDMMC0_DAT1>,
122 <PIN_PA4__SDMMC0_DAT2>,
123 <PIN_PA5__SDMMC0_DAT3>;
124 bias-disable;
125 };
126
127 pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default {
128 pinmux = <PIN_PA0__SDMMC0_CK>,
129 <PIN_PA11__SDMMC0_VDDSEL>,
130 <PIN_PA12__SDMMC0_WP>,
131 <PIN_PA13__SDMMC0_CD>;
132 bias-disable;
133 };
134
135 pinctrl_uart0_default: uart0_default {
136 pinmux = <PIN_PB26__URXD0>,
137 <PIN_PB27__UTXD0>;
138 bias-disable;
139 };
140
141 pinctrl_onewire_tm_default: onewire_tm_default {
142 pinmux = <PIN_PC9__GPIO>;
143 bias-pull-up;
144 };
145 };
146 };
147 };
148 };
149};