blob: 33f9e338684478c054ed0c3fa085a806a00ecdcd [file] [log] [blame]
Akshay Bhat9301aea2016-07-29 11:44:46 -04001/*
2 * Copyright (C) 2016 Timesys Corporation
3 * Copyright (C) 2016 Advantech Corporation
4 * Copyright (C) 2012 Freescale Semiconductor, Inc.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __ADVANTECH_DMSBA16_CONFIG_H
10#define __ADVANTECH_DMSBA16_CONFIG_H
11
12#include <asm/arch/imx-regs.h>
13#include <asm/imx-common/gpio.h>
14
15#define CONFIG_BOARD_NAME "Advantech DMS-BA16"
Akshay Bhat9301aea2016-07-29 11:44:46 -040016
17#define CONFIG_MXC_UART_BASE UART4_BASE
Simon Glass4694a742016-10-17 20:12:39 -060018#define CONSOLE_DEV "ttymxc3"
Akshay Bhat9301aea2016-07-29 11:44:46 -040019#define CONFIG_EXTRA_BOOTARGS "panic=10"
20
21#define CONFIG_BOOT_DIR ""
22#define CONFIG_LOADCMD "fatload"
23#define CONFIG_RFSPART "2"
24
25#define CONFIG_SUPPORT_EMMC_BOOT
26
27#include "mx6_common.h"
28#include <linux/sizes.h>
29
Akshay Bhat9301aea2016-07-29 11:44:46 -040030#define CONFIG_CMDLINE_TAG
31#define CONFIG_SETUP_MEMORY_TAGS
32#define CONFIG_INITRD_TAG
33#define CONFIG_REVISION_TAG
34#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
35
Akshay Bhat9301aea2016-07-29 11:44:46 -040036#define CONFIG_MXC_GPIO
37#define CONFIG_MXC_UART
38
39#define CONFIG_CMD_FUSE
40#define CONFIG_MXC_OCOTP
41
42/* SATA Configs */
43#define CONFIG_CMD_SATA
44#define CONFIG_DWC_AHSATA
45#define CONFIG_SYS_SATA_MAX_DEVICE 1
46#define CONFIG_DWC_AHSATA_PORT_ID 0
47#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
48#define CONFIG_LBA48
49#define CONFIG_LIBATA
50
51/* MMC Configs */
52#define CONFIG_FSL_ESDHC
53#define CONFIG_FSL_USDHC
54#define CONFIG_SYS_FSL_ESDHC_ADDR 0
Akshay Bhat9301aea2016-07-29 11:44:46 -040055#define CONFIG_GENERIC_MMC
56#define CONFIG_BOUNCE_BUFFER
Akshay Bhat9301aea2016-07-29 11:44:46 -040057
58/* USB Configs */
59#define CONFIG_USB_EHCI
60#define CONFIG_USB_EHCI_MX6
61#define CONFIG_USB_STORAGE
62#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
63#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
64#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
65#define CONFIG_MXC_USB_FLAGS 0
Akshay Bhat9301aea2016-07-29 11:44:46 -040066#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
67
68#define CONFIG_USBD_HS
69#define CONFIG_USB_FUNCTION_MASS_STORAGE
70#define CONFIG_USB_GADGET_VBUS_DRAW 2
71
72/* Networking Configs */
73#define CONFIG_FEC_MXC
74#define CONFIG_MII
75#define IMX_FEC_BASE ENET_BASE_ADDR
76#define CONFIG_FEC_XCV_TYPE RGMII
77#define CONFIG_ETHPRIME "FEC"
78#define CONFIG_FEC_MXC_PHYADDR 4
79#define CONFIG_PHYLIB
80#define CONFIG_PHY_ATHEROS
81
82/* Serial Flash */
83#ifdef CONFIG_CMD_SF
84#define CONFIG_MXC_SPI
85#define CONFIG_SF_DEFAULT_BUS 0
86#define CONFIG_SF_DEFAULT_CS 0
87#define CONFIG_SF_DEFAULT_SPEED 20000000
88#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
89#endif
90
91/* allow to overwrite serial and ethaddr */
92#define CONFIG_ENV_OVERWRITE
93#define CONFIG_CONS_INDEX 1
94#define CONFIG_BAUDRATE 115200
95
96/* Command definition */
97#define CONFIG_CMD_BMODE
98
99#define CONFIG_LOADADDR 0x12000000
100#define CONFIG_SYS_TEXT_BASE 0x17800000
101
102#define CONFIG_EXTRA_ENV_SETTINGS \
103 "script=boot.scr\0" \
104 "image=" CONFIG_BOOT_DIR "/uImage\0" \
105 "uboot=u-boot.imx\0" \
106 "fdt_file=" CONFIG_BOOT_DIR "/" CONFIG_DEFAULT_FDT_FILE "\0" \
107 "fdt_addr=0x18000000\0" \
108 "boot_fdt=yes\0" \
109 "ip_dyn=yes\0" \
Simon Glass4694a742016-10-17 20:12:39 -0600110 "console=" CONSOLE_DEV "\0" \
Akshay Bhat9301aea2016-07-29 11:44:46 -0400111 "fdt_high=0xffffffff\0" \
112 "initrd_high=0xffffffff\0" \
113 "sddev=0\0" \
114 "emmcdev=1\0" \
115 "partnum=1\0" \
116 "loadcmd=" CONFIG_LOADCMD "\0" \
117 "rfspart=" CONFIG_RFSPART "\0" \
118 "update_sd_firmware=" \
119 "if test ${ip_dyn} = yes; then " \
120 "setenv get_cmd dhcp; " \
121 "else " \
122 "setenv get_cmd tftp; " \
123 "fi; " \
124 "if mmc dev ${mmcdev}; then " \
125 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
126 "setexpr fw_sz ${filesize} / 0x200; " \
127 "setexpr fw_sz ${fw_sz} + 1; " \
128 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
129 "fi; " \
130 "fi\0" \
131 "update_sf_uboot=" \
132 "if tftp $loadaddr $uboot; then " \
133 "sf probe; " \
134 "sf erase 0 0xC0000; " \
135 "sf write $loadaddr 0x400 $filesize; " \
136 "echo 'U-Boot upgraded. Please reset'; " \
137 "fi\0" \
138 "setargs=setenv bootargs console=${console},${baudrate} " \
139 "root=/dev/${rootdev} rw rootwait " CONFIG_EXTRA_BOOTARGS "\0" \
140 "loadbootscript=" \
141 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
142 "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
143 " source\0" \
144 "loadimage=" \
145 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
146 "loadfdt=${loadcmd} ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
147 "tryboot=" \
148 "if run loadbootscript; then " \
149 "run bootscript; " \
150 "else " \
151 "if run loadimage; then " \
152 "run doboot; " \
153 "fi; " \
154 "fi;\0" \
155 "doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
156 "run setargs; " \
157 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
158 "if run loadfdt; then " \
159 "bootm ${loadaddr} - ${fdt_addr}; " \
160 "else " \
161 "if test ${boot_fdt} = try; then " \
162 "bootm; " \
163 "else " \
164 "echo WARN: Cannot load the DT; " \
165 "fi; " \
166 "fi; " \
167 "else " \
168 "bootm; " \
169 "fi;\0" \
170 "netargs=setenv bootargs console=${console},${baudrate} " \
171 "root=/dev/nfs " \
172 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
173 "netboot=echo Booting from net ...; " \
174 "run netargs; " \
175 "if test ${ip_dyn} = yes; then " \
176 "setenv get_cmd dhcp; " \
177 "else " \
178 "setenv get_cmd tftp; " \
179 "fi; " \
180 "${get_cmd} ${image}; " \
181 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
182 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
183 "bootm ${loadaddr} - ${fdt_addr}; " \
184 "else " \
185 "if test ${boot_fdt} = try; then " \
186 "bootm; " \
187 "else " \
188 "echo WARN: Cannot load the DT; " \
189 "fi; " \
190 "fi; " \
191 "else " \
192 "bootm; " \
193 "fi;\0" \
194
195#define CONFIG_BOOTCOMMAND \
196 "usb start; " \
197 "setenv dev usb; " \
198 "setenv devnum 0; " \
199 "setenv rootdev sda${rfspart}; " \
200 "run tryboot; " \
201 \
202 "setenv dev mmc; " \
203 "setenv rootdev mmcblk0p${rfspart}; " \
204 \
205 "setenv devnum ${sddev}; " \
206 "if mmc dev ${devnum}; then " \
207 "run tryboot; " \
208 "fi; " \
209 \
210 "setenv devnum ${emmcdev}; " \
211 "setenv rootdev mmcblk${emmcdev}p${rfspart}; " \
212 "if mmc dev ${devnum}; then " \
213 "run tryboot; " \
214 "fi; " \
215 \
216 "bmode usb; " \
217
218#define CONFIG_ARP_TIMEOUT 200UL
219
220/* Miscellaneous configurable options */
221#define CONFIG_SYS_LONGHELP
222#define CONFIG_AUTO_COMPLETE
223
224/* Print Buffer Size */
225#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
226#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
227
228#define CONFIG_SYS_MEMTEST_START 0x10000000
229#define CONFIG_SYS_MEMTEST_END 0x10010000
230#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
231
232#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
233
234#define CONFIG_CMDLINE_EDITING
235#define CONFIG_STACKSIZE (128 * 1024)
236
237/* Physical Memory Map */
238#define CONFIG_NR_DRAM_BANKS 1
239#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
240
241#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
242#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
243#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
244
245#define CONFIG_SYS_INIT_SP_OFFSET \
246 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
247#define CONFIG_SYS_INIT_SP_ADDR \
248 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
249
250/* FLASH and environment organization */
251#define CONFIG_SYS_NO_FLASH
252
253#define CONFIG_ENV_IS_IN_SPI_FLASH
254#define CONFIG_ENV_SIZE (8 * 1024)
255#define CONFIG_ENV_OFFSET (768 * 1024)
256#define CONFIG_ENV_SECT_SIZE (64 * 1024)
257#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
258#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
259#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
260#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
261
262#ifndef CONFIG_SYS_DCACHE_OFF
263#endif
264
265#define CONFIG_SYS_FSL_USDHC_NUM 3
266
267/* Framebuffer */
Akshay Bhat9301aea2016-07-29 11:44:46 -0400268#define CONFIG_VIDEO_IPUV3
Akshay Bhat9301aea2016-07-29 11:44:46 -0400269#define CONFIG_VIDEO_BMP_RLE8
270#define CONFIG_SPLASH_SCREEN
271#define CONFIG_SPLASH_SCREEN_ALIGN
272#define CONFIG_BMP_16BPP
273#define CONFIG_VIDEO_LOGO
274#define CONFIG_VIDEO_BMP_LOGO
275#define CONFIG_IPUV3_CLK 260000000
276#define CONFIG_IMX_HDMI
277#define CONFIG_IMX_VIDEO_SKIP
278
279#define CONFIG_PWM_IMX
280#define CONFIG_IMX6_PWM_PER_CLK 66000000
281
282#undef CONFIG_CMD_PCI
283#ifdef CONFIG_CMD_PCI
Akshay Bhat9301aea2016-07-29 11:44:46 -0400284#define CONFIG_PCI_SCAN_SHOW
285#define CONFIG_PCIE_IMX
286#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
287#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5)
288#endif
289
290/* I2C Configs */
291#define CONFIG_SYS_I2C
292#define CONFIG_SYS_I2C_MXC
293#define CONFIG_SYS_I2C_SPEED 100000
294#define CONFIG_SYS_I2C_MXC_I2C1
295#define CONFIG_SYS_I2C_MXC_I2C2
296#define CONFIG_SYS_I2C_MXC_I2C3
297
298#endif /* __ADVANTECH_DMSBA16_CONFIG_H */