Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 2 | /** |
| 3 | * io.h - DesignWare USB3 DRD IO Header |
| 4 | * |
Nishanth Menon | eaa39c6 | 2023-11-01 15:56:03 -0500 | [diff] [blame] | 5 | * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 6 | * |
| 7 | * Authors: Felipe Balbi <balbi@ti.com>, |
| 8 | * Sebastian Andrzej Siewior <bigeasy@linutronix.de> |
| 9 | * |
Kishon Vijay Abraham I | d1e431a | 2015-02-23 18:39:52 +0530 | [diff] [blame] | 10 | * Taken from Linux Kernel v3.19-rc1 (drivers/usb/dwc3/io.h) and ported |
| 11 | * to uboot. |
| 12 | * |
| 13 | * commit 2c4cbe6e5a : usb: dwc3: add tracepoints to aid debugging |
| 14 | * |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #ifndef __DRIVERS_USB_DWC3_IO_H |
| 18 | #define __DRIVERS_USB_DWC3_IO_H |
| 19 | |
Simon Glass | 6333448 | 2019-11-14 12:57:39 -0700 | [diff] [blame] | 20 | #include <cpu_func.h> |
Kishon Vijay Abraham I | c2b77b6 | 2015-02-23 18:39:54 +0530 | [diff] [blame] | 21 | #include <asm/io.h> |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 22 | |
Kishon Vijay Abraham I | c7bdfe3 | 2015-02-23 18:40:13 +0530 | [diff] [blame] | 23 | #define CACHELINE_SIZE CONFIG_SYS_CACHELINE_SIZE |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 24 | static inline u32 dwc3_readl(void __iomem *base, u32 offset) |
| 25 | { |
Michal Simek | 698cd6f | 2015-10-30 16:24:06 +0100 | [diff] [blame] | 26 | unsigned long offs = offset - DWC3_GLOBALS_REGS_START; |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 27 | u32 value; |
| 28 | |
| 29 | /* |
| 30 | * We requested the mem region starting from the Globals address |
| 31 | * space, see dwc3_probe in core.c. |
| 32 | * However, the offsets are given starting from xHCI address space. |
| 33 | */ |
| 34 | value = readl(base + offs); |
| 35 | |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 36 | return value; |
| 37 | } |
| 38 | |
| 39 | static inline void dwc3_writel(void __iomem *base, u32 offset, u32 value) |
| 40 | { |
Michal Simek | 698cd6f | 2015-10-30 16:24:06 +0100 | [diff] [blame] | 41 | unsigned long offs = offset - DWC3_GLOBALS_REGS_START; |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 42 | |
| 43 | /* |
| 44 | * We requested the mem region starting from the Globals address |
| 45 | * space, see dwc3_probe in core.c. |
| 46 | * However, the offsets are given starting from xHCI address space. |
| 47 | */ |
| 48 | writel(value, base + offs); |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 49 | } |
| 50 | |
Philipp Tomsich | ed12167 | 2017-04-06 16:58:52 +0200 | [diff] [blame] | 51 | static inline void dwc3_flush_cache(uintptr_t addr, int length) |
Kishon Vijay Abraham I | c7bdfe3 | 2015-02-23 18:40:13 +0530 | [diff] [blame] | 52 | { |
| 53 | flush_dcache_range(addr, addr + ROUND(length, CACHELINE_SIZE)); |
| 54 | } |
Kishon Vijay Abraham I | 1530fe3 | 2015-02-23 18:39:50 +0530 | [diff] [blame] | 55 | #endif /* __DRIVERS_USB_DWC3_IO_H */ |