Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/spi/mediatek,spi-mt65xx.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: SPI Bus controller for MediaTek ARM SoCs |
| 8 | |
| 9 | maintainers: |
| 10 | - Leilk Liu <leilk.liu@mediatek.com> |
| 11 | |
| 12 | allOf: |
| 13 | - $ref: /schemas/spi/spi-controller.yaml# |
| 14 | |
| 15 | properties: |
| 16 | compatible: |
| 17 | oneOf: |
| 18 | - items: |
| 19 | - enum: |
| 20 | - mediatek,mt7629-spi |
| 21 | - mediatek,mt8365-spi |
| 22 | - const: mediatek,mt7622-spi |
| 23 | - items: |
| 24 | - enum: |
| 25 | - mediatek,mt8516-spi |
| 26 | - const: mediatek,mt2712-spi |
| 27 | - items: |
| 28 | - enum: |
| 29 | - mediatek,mt6779-spi |
| 30 | - mediatek,mt8186-spi |
| 31 | - mediatek,mt8192-spi |
| 32 | - mediatek,mt8195-spi |
| 33 | - const: mediatek,mt6765-spi |
| 34 | - items: |
| 35 | - enum: |
| 36 | - mediatek,mt7986-spi-ipm |
| 37 | - mediatek,mt8188-spi-ipm |
| 38 | - const: mediatek,spi-ipm |
| 39 | - items: |
| 40 | - enum: |
| 41 | - mediatek,mt2701-spi |
| 42 | - mediatek,mt2712-spi |
| 43 | - mediatek,mt6589-spi |
| 44 | - mediatek,mt6765-spi |
| 45 | - mediatek,mt6893-spi |
| 46 | - mediatek,mt7622-spi |
| 47 | - mediatek,mt8135-spi |
| 48 | - mediatek,mt8173-spi |
| 49 | - mediatek,mt8183-spi |
| 50 | |
| 51 | reg: |
| 52 | maxItems: 1 |
| 53 | |
| 54 | interrupts: |
| 55 | maxItems: 1 |
| 56 | |
| 57 | clocks: |
| 58 | minItems: 3 |
| 59 | items: |
| 60 | - description: clock used for the parent clock |
| 61 | - description: clock used for the muxes clock |
| 62 | - description: clock used for the clock gate |
| 63 | - description: clock used for the AHB bus, this clock is optional |
| 64 | |
| 65 | clock-names: |
| 66 | minItems: 3 |
| 67 | items: |
| 68 | - const: parent-clk |
| 69 | - const: sel-clk |
| 70 | - const: spi-clk |
| 71 | - const: hclk |
| 72 | |
| 73 | mediatek,pad-select: |
| 74 | $ref: /schemas/types.yaml#/definitions/uint32-array |
| 75 | minItems: 1 |
| 76 | maxItems: 4 |
| 77 | items: |
| 78 | enum: [0, 1, 2, 3] |
| 79 | description: |
| 80 | specify which pins group(ck/mi/mo/cs) spi controller used. |
| 81 | This is an array. |
| 82 | |
| 83 | required: |
| 84 | - compatible |
| 85 | - reg |
| 86 | - interrupts |
| 87 | - clocks |
| 88 | - clock-names |
| 89 | - '#address-cells' |
| 90 | - '#size-cells' |
| 91 | |
| 92 | unevaluatedProperties: false |
| 93 | |
| 94 | examples: |
| 95 | - | |
| 96 | #include <dt-bindings/clock/mt8173-clk.h> |
| 97 | #include <dt-bindings/gpio/gpio.h> |
| 98 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 99 | #include <dt-bindings/interrupt-controller/irq.h> |
| 100 | |
| 101 | spi@1100a000 { |
| 102 | compatible = "mediatek,mt8173-spi"; |
| 103 | #address-cells = <1>; |
| 104 | #size-cells = <0>; |
| 105 | reg = <0x1100a000 0x1000>; |
| 106 | interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>; |
| 107 | clocks = <&topckgen CLK_TOP_SYSPLL3_D2>, |
| 108 | <&topckgen CLK_TOP_SPI_SEL>, |
| 109 | <&pericfg CLK_PERI_SPI0>; |
| 110 | clock-names = "parent-clk", "sel-clk", "spi-clk"; |
| 111 | cs-gpios = <&pio 105 GPIO_ACTIVE_LOW>, <&pio 72 GPIO_ACTIVE_LOW>; |
| 112 | mediatek,pad-select = <1>, <0>; |
| 113 | }; |