| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/spi/brcm,bcm63xx-spi.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Broadcom BCM6348/BCM6358 SPI controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Jonas Gorski <jonas.gorski@gmail.com> |
| 11 | |
| 12 | description: | |
| 13 | Broadcom "Low Speed" SPI controller found in many older MIPS based Broadband |
| 14 | SoCs. |
| 15 | |
| 16 | This controller has a limitation that can not keep the chip select line active |
| 17 | between the SPI transfers within the same SPI message. This can terminate the |
| 18 | transaction to some SPI devices prematurely. The issue can be worked around by |
| 19 | the controller's prepend mode. |
| 20 | |
| 21 | allOf: |
| 22 | - $ref: spi-controller.yaml# |
| 23 | |
| 24 | properties: |
| 25 | compatible: |
| 26 | oneOf: |
| 27 | - items: |
| 28 | - enum: |
| 29 | - brcm,bcm6368-spi |
| 30 | - brcm,bcm6362-spi |
| 31 | - brcm,bcm63268-spi |
| 32 | - const: brcm,bcm6358-spi |
| 33 | - enum: |
| 34 | - brcm,bcm6348-spi |
| 35 | - brcm,bcm6358-spi |
| 36 | |
| 37 | reg: |
| 38 | maxItems: 1 |
| 39 | |
| 40 | clocks: |
| 41 | items: |
| 42 | - description: SPI master reference clock |
| 43 | |
| 44 | clock-names: |
| 45 | items: |
| 46 | - const: spi |
| 47 | |
| 48 | interrupts: |
| 49 | maxItems: 1 |
| 50 | |
| 51 | required: |
| 52 | - compatible |
| 53 | - reg |
| 54 | - clocks |
| 55 | - clock-names |
| 56 | - interrupts |
| 57 | |
| 58 | unevaluatedProperties: false |
| 59 | |
| 60 | examples: |
| 61 | - | |
| 62 | spi@10000800 { |
| 63 | compatible = "brcm,bcm6368-spi", "brcm,bcm6358-spi"; |
| 64 | reg = <0x10000800 0x70c>; |
| 65 | interrupts = <1>; |
| 66 | clocks = <&clkctl 9>; |
| 67 | clock-names = "spi"; |
| 68 | num-cs = <5>; |
| 69 | #address-cells = <1>; |
| 70 | #size-cells = <0>; |
| 71 | }; |