| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/serial/renesas,sci.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Renesas Serial Communication Interface |
| 8 | |
| 9 | maintainers: |
| 10 | - Geert Uytterhoeven <geert+renesas@glider.be> |
| 11 | |
| 12 | allOf: |
| 13 | - $ref: serial.yaml# |
| 14 | |
| 15 | properties: |
| 16 | compatible: |
| 17 | oneOf: |
| 18 | - items: |
| 19 | - enum: |
| Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 20 | - renesas,r9a07g043-sci # RZ/G2UL and RZ/Five |
| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 21 | - renesas,r9a07g044-sci # RZ/G2{L,LC} |
| 22 | - renesas,r9a07g054-sci # RZ/V2L |
| 23 | - const: renesas,sci # generic SCI compatible UART |
| 24 | |
| 25 | - items: |
| 26 | - const: renesas,sci # generic SCI compatible UART |
| 27 | |
| 28 | reg: |
| 29 | maxItems: 1 |
| 30 | |
| 31 | interrupts: |
| 32 | items: |
| 33 | - description: Error interrupt |
| 34 | - description: Receive buffer full interrupt |
| 35 | - description: Transmit buffer empty interrupt |
| 36 | - description: Transmit end interrupt |
| 37 | |
| 38 | interrupt-names: |
| 39 | items: |
| 40 | - const: eri |
| 41 | - const: rxi |
| 42 | - const: txi |
| 43 | - const: tei |
| 44 | |
| 45 | clocks: |
| 46 | minItems: 1 |
| 47 | maxItems: 2 |
| 48 | |
| 49 | clock-names: |
| 50 | minItems: 1 |
| 51 | maxItems: 2 |
| 52 | items: |
| 53 | enum: |
| 54 | - fck # UART functional clock |
| 55 | - sck # optional external clock input |
| 56 | |
| 57 | uart-has-rtscts: false |
| 58 | |
| 59 | required: |
| 60 | - compatible |
| 61 | - reg |
| 62 | - interrupts |
| 63 | - clocks |
| 64 | - clock-names |
| 65 | |
| 66 | if: |
| 67 | properties: |
| 68 | compatible: |
| 69 | contains: |
| 70 | enum: |
| 71 | - renesas,r9a07g043-sci |
| 72 | - renesas,r9a07g044-sci |
| 73 | - renesas,r9a07g054-sci |
| 74 | then: |
| 75 | properties: |
| 76 | resets: |
| 77 | maxItems: 1 |
| 78 | |
| 79 | power-domains: |
| 80 | maxItems: 1 |
| 81 | |
| 82 | required: |
| 83 | - resets |
| 84 | - power-domains |
| 85 | |
| 86 | unevaluatedProperties: false |
| 87 | |
| 88 | examples: |
| 89 | - | |
| 90 | #include <dt-bindings/clock/r9a07g044-cpg.h> |
| 91 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 92 | |
| 93 | aliases { |
| 94 | serial0 = &sci0; |
| 95 | }; |
| 96 | |
| 97 | sci0: serial@1004d000 { |
| 98 | compatible = "renesas,r9a07g044-sci", "renesas,sci"; |
| 99 | reg = <0x1004d000 0x400>; |
| 100 | interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, |
| 101 | <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, |
| 102 | <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, |
| 103 | <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; |
| 104 | interrupt-names = "eri", "rxi", "txi", "tei"; |
| 105 | clocks = <&cpg CPG_MOD R9A07G044_SCI0_CLKP>; |
| 106 | clock-names = "fck"; |
| 107 | power-domains = <&cpg>; |
| 108 | resets = <&cpg R9A07G044_SCI0_RST>; |
| 109 | }; |