blob: 7732e79a42b905505636b0754042d19d37c3af19 [file] [log] [blame]
Tom Rini93743d22024-04-01 09:08:13 -04001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/st,stm32mp25-rcc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: STM32MP25 Reset Clock Controller
8
9maintainers:
10 - Gabriel Fernandez <gabriel.fernandez@foss.st.com>
11
12description: |
13 The RCC hardware block is both a reset and a clock controller.
14 RCC makes also power management (resume/supend).
15
16 See also::
17 include/dt-bindings/clock/st,stm32mp25-rcc.h
18 include/dt-bindings/reset/st,stm32mp25-rcc.h
19
20properties:
21 compatible:
22 enum:
23 - st,stm32mp25-rcc
24
25 reg:
26 maxItems: 1
27
28 '#clock-cells':
29 const: 1
30
31 '#reset-cells':
32 const: 1
33
34 clocks:
35 items:
36 - description: CK_SCMI_HSE High Speed External oscillator (8 to 48 MHz)
37 - description: CK_SCMI_HSI High Speed Internal oscillator (~ 64 MHz)
38 - description: CK_SCMI_MSI Low Power Internal oscillator (~ 4 MHz or ~ 16 MHz)
39 - description: CK_SCMI_LSE Low Speed External oscillator (32 KHz)
40 - description: CK_SCMI_LSI Low Speed Internal oscillator (~ 32 KHz)
41
42 clock-names:
43 items:
44 - const: hse
45 - const: hsi
46 - const: msi
47 - const: lse
48 - const: lsi
49
50required:
51 - compatible
52 - reg
53 - '#clock-cells'
54 - '#reset-cells'
55 - clocks
56 - clock-names
57
58additionalProperties: false
59
60examples:
61 - |
62 #include <dt-bindings/clock/st,stm32mp25-rcc.h>
63
64 rcc: clock-controller@44200000 {
65 compatible = "st,stm32mp25-rcc";
66 reg = <0x44200000 0x10000>;
67 #clock-cells = <1>;
68 #reset-cells = <1>;
69 clock-names = "hse", "hsi", "msi", "lse", "lsi";
70 clocks = <&scmi_clk CK_SCMI_HSE>,
71 <&scmi_clk CK_SCMI_HSI>,
72 <&scmi_clk CK_SCMI_MSI>,
73 <&scmi_clk CK_SCMI_LSE>,
74 <&scmi_clk CK_SCMI_LSI>;
75 };
76...