Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8450.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Qualcomm Global Clock & Reset Controller on SM8450 |
| 8 | |
| 9 | maintainers: |
| 10 | - Vinod Koul <vkoul@kernel.org> |
| 11 | |
| 12 | description: | |
| 13 | Qualcomm global clock control module provides the clocks, resets and power |
| 14 | domains on SM8450 |
| 15 | |
| 16 | See also:: include/dt-bindings/clock/qcom,gcc-sm8450.h |
| 17 | |
| 18 | properties: |
| 19 | compatible: |
| 20 | const: qcom,gcc-sm8450 |
| 21 | |
| 22 | clocks: |
| 23 | items: |
| 24 | - description: Board XO source |
| 25 | - description: Sleep clock source |
| 26 | - description: PCIE 0 Pipe clock source (Optional clock) |
| 27 | - description: PCIE 1 Pipe clock source (Optional clock) |
| 28 | - description: PCIE 1 Phy Auxiliary clock source (Optional clock) |
| 29 | - description: UFS Phy Rx symbol 0 clock source (Optional clock) |
| 30 | - description: UFS Phy Rx symbol 1 clock source (Optional clock) |
| 31 | - description: UFS Phy Tx symbol 0 clock source (Optional clock) |
| 32 | - description: USB3 Phy wrapper pipe clock source (Optional clock) |
| 33 | minItems: 2 |
| 34 | |
| 35 | clock-names: |
| 36 | items: |
| 37 | - const: bi_tcxo |
| 38 | - const: sleep_clk |
| 39 | - const: pcie_0_pipe_clk # Optional clock |
| 40 | - const: pcie_1_pipe_clk # Optional clock |
| 41 | - const: pcie_1_phy_aux_clk # Optional clock |
| 42 | - const: ufs_phy_rx_symbol_0_clk # Optional clock |
| 43 | - const: ufs_phy_rx_symbol_1_clk # Optional clock |
| 44 | - const: ufs_phy_tx_symbol_0_clk # Optional clock |
| 45 | - const: usb3_phy_wrapper_gcc_usb30_pipe_clk # Optional clock |
| 46 | minItems: 2 |
| 47 | |
| 48 | required: |
| 49 | - compatible |
| 50 | - clocks |
| 51 | - clock-names |
| 52 | |
| 53 | allOf: |
| 54 | - $ref: qcom,gcc.yaml# |
| 55 | |
| 56 | unevaluatedProperties: false |
| 57 | |
| 58 | examples: |
| 59 | - | |
| 60 | #include <dt-bindings/clock/qcom,rpmh.h> |
| 61 | clock-controller@100000 { |
| 62 | compatible = "qcom,gcc-sm8450"; |
| 63 | reg = <0x00100000 0x001f4200>; |
| 64 | clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>; |
| 65 | clock-names = "bi_tcxo", "sleep_clk"; |
| 66 | #clock-cells = <1>; |
| 67 | #reset-cells = <1>; |
| 68 | #power-domain-cells = <1>; |
| 69 | }; |
| 70 | |
| 71 | ... |