Rick Chen | 7376677 | 2019-04-02 15:56:40 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2019, Rick Chen <rick@andestech.com> |
Sean Anderson | 87e6ce5 | 2020-09-28 10:52:24 -0400 | [diff] [blame] | 4 | * Copyright (C) 2020, Sean Anderson <seanga2@gmail.com> |
Rick Chen | 7376677 | 2019-04-02 15:56:40 +0800 | [diff] [blame] | 5 | * |
| 6 | * U-Boot syscon driver for Andes's Platform Level Machine Timer (PLMT). |
| 7 | * The PLMT block holds memory-mapped mtime register |
| 8 | * associated with timer tick. |
| 9 | */ |
| 10 | |
Rick Chen | 7376677 | 2019-04-02 15:56:40 +0800 | [diff] [blame] | 11 | #include <dm.h> |
Sean Anderson | 87e6ce5 | 2020-09-28 10:52:24 -0400 | [diff] [blame] | 12 | #include <timer.h> |
Rick Chen | 7376677 | 2019-04-02 15:56:40 +0800 | [diff] [blame] | 13 | #include <asm/io.h> |
Simon Glass | 9558862 | 2020-12-22 19:30:28 -0700 | [diff] [blame] | 14 | #include <dm/device-internal.h> |
Simon Glass | d66c5f7 | 2020-02-03 07:36:15 -0700 | [diff] [blame] | 15 | #include <linux/err.h> |
Rick Chen | 7376677 | 2019-04-02 15:56:40 +0800 | [diff] [blame] | 16 | |
| 17 | /* mtime register */ |
| 18 | #define MTIME_REG(base) ((ulong)(base)) |
| 19 | |
Pragnesh Patel | 02038c3 | 2021-01-17 18:11:25 +0530 | [diff] [blame] | 20 | static u64 notrace andes_plmt_get_count(struct udevice *dev) |
Sean Anderson | 87e6ce5 | 2020-09-28 10:52:24 -0400 | [diff] [blame] | 21 | { |
Simon Glass | 9558862 | 2020-12-22 19:30:28 -0700 | [diff] [blame] | 22 | return readq((void __iomem *)MTIME_REG(dev_get_priv(dev))); |
Sean Anderson | 87e6ce5 | 2020-09-28 10:52:24 -0400 | [diff] [blame] | 23 | } |
Rick Chen | 7376677 | 2019-04-02 15:56:40 +0800 | [diff] [blame] | 24 | |
Pragnesh Patel | 02038c3 | 2021-01-17 18:11:25 +0530 | [diff] [blame] | 25 | #if CONFIG_IS_ENABLED(RISCV_MMODE) && IS_ENABLED(CONFIG_TIMER_EARLY) |
| 26 | /** |
| 27 | * timer_early_get_rate() - Get the timer rate before driver model |
| 28 | */ |
| 29 | unsigned long notrace timer_early_get_rate(void) |
| 30 | { |
| 31 | return RISCV_MMODE_TIMER_FREQ; |
| 32 | } |
| 33 | |
| 34 | /** |
| 35 | * timer_early_get_count() - Get the timer count before driver model |
| 36 | * |
| 37 | */ |
| 38 | u64 notrace timer_early_get_count(void) |
| 39 | { |
| 40 | return readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE)); |
| 41 | } |
| 42 | #endif |
| 43 | |
Sean Anderson | 87e6ce5 | 2020-09-28 10:52:24 -0400 | [diff] [blame] | 44 | static const struct timer_ops andes_plmt_ops = { |
| 45 | .get_count = andes_plmt_get_count, |
| 46 | }; |
Rick Chen | 7376677 | 2019-04-02 15:56:40 +0800 | [diff] [blame] | 47 | |
Sean Anderson | 87e6ce5 | 2020-09-28 10:52:24 -0400 | [diff] [blame] | 48 | static int andes_plmt_probe(struct udevice *dev) |
| 49 | { |
Simon Glass | 9558862 | 2020-12-22 19:30:28 -0700 | [diff] [blame] | 50 | dev_set_priv(dev, dev_read_addr_ptr(dev)); |
| 51 | if (!dev_get_priv(dev)) |
Sean Anderson | 87e6ce5 | 2020-09-28 10:52:24 -0400 | [diff] [blame] | 52 | return -EINVAL; |
Rick Chen | 7376677 | 2019-04-02 15:56:40 +0800 | [diff] [blame] | 53 | |
Sean Anderson | 87e6ce5 | 2020-09-28 10:52:24 -0400 | [diff] [blame] | 54 | return timer_timebase_fallback(dev); |
Rick Chen | 7376677 | 2019-04-02 15:56:40 +0800 | [diff] [blame] | 55 | } |
| 56 | |
| 57 | static const struct udevice_id andes_plmt_ids[] = { |
Yu Chien Peter Lin | 739cd6f | 2022-10-25 23:03:50 +0800 | [diff] [blame] | 58 | { .compatible = "andestech,plmt0" }, |
Rick Chen | 7376677 | 2019-04-02 15:56:40 +0800 | [diff] [blame] | 59 | { } |
| 60 | }; |
| 61 | |
| 62 | U_BOOT_DRIVER(andes_plmt) = { |
| 63 | .name = "andes_plmt", |
Sean Anderson | 87e6ce5 | 2020-09-28 10:52:24 -0400 | [diff] [blame] | 64 | .id = UCLASS_TIMER, |
Rick Chen | 7376677 | 2019-04-02 15:56:40 +0800 | [diff] [blame] | 65 | .of_match = andes_plmt_ids, |
Sean Anderson | 87e6ce5 | 2020-09-28 10:52:24 -0400 | [diff] [blame] | 66 | .ops = &andes_plmt_ops, |
| 67 | .probe = andes_plmt_probe, |
Rick Chen | 7376677 | 2019-04-02 15:56:40 +0800 | [diff] [blame] | 68 | .flags = DM_FLAG_PRE_RELOC, |
| 69 | }; |