David Wu | 5f596ae | 2019-01-02 21:00:55 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * (C) Copyright 2019 Rockchip Electronics Co., Ltd |
| 4 | */ |
| 5 | |
David Wu | 5f596ae | 2019-01-02 21:00:55 +0800 | [diff] [blame] | 6 | #include <dm.h> |
| 7 | #include <dm/pinctrl.h> |
| 8 | #include <regmap.h> |
| 9 | #include <syscon.h> |
Simon Glass | 4dcacfc | 2020-05-10 11:40:13 -0600 | [diff] [blame] | 10 | #include <linux/bitops.h> |
David Wu | 5f596ae | 2019-01-02 21:00:55 +0800 | [diff] [blame] | 11 | |
| 12 | #include "pinctrl-rockchip.h" |
| 13 | |
David Wu | 3dd7d6c | 2019-04-16 21:50:55 +0800 | [diff] [blame] | 14 | static int rk3036_set_mux(struct rockchip_pin_bank *bank, int pin, int mux) |
| 15 | { |
| 16 | struct rockchip_pinctrl_priv *priv = bank->priv; |
| 17 | int iomux_num = (pin / 8); |
| 18 | struct regmap *regmap; |
| 19 | int reg, ret, mask, mux_type; |
| 20 | u8 bit; |
| 21 | u32 data; |
| 22 | |
| 23 | regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) |
| 24 | ? priv->regmap_pmu : priv->regmap_base; |
| 25 | |
| 26 | /* get basic quadrupel of mux registers and the correct reg inside */ |
| 27 | mux_type = bank->iomux[iomux_num].type; |
| 28 | reg = bank->iomux[iomux_num].offset; |
| 29 | reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask); |
| 30 | |
| 31 | data = (mask << (bit + 16)); |
| 32 | data |= (mux & mask) << bit; |
| 33 | ret = regmap_write(regmap, reg, data); |
| 34 | |
| 35 | return ret; |
| 36 | } |
| 37 | |
David Wu | 5f596ae | 2019-01-02 21:00:55 +0800 | [diff] [blame] | 38 | #define RK3036_PULL_OFFSET 0x118 |
| 39 | #define RK3036_PULL_PINS_PER_REG 16 |
| 40 | #define RK3036_PULL_BANK_STRIDE 8 |
| 41 | |
| 42 | static void rk3036_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, |
| 43 | int pin_num, struct regmap **regmap, |
| 44 | int *reg, u8 *bit) |
| 45 | { |
| 46 | struct rockchip_pinctrl_priv *priv = bank->priv; |
| 47 | |
| 48 | *regmap = priv->regmap_base; |
| 49 | *reg = RK3036_PULL_OFFSET; |
| 50 | *reg += bank->bank_num * RK3036_PULL_BANK_STRIDE; |
| 51 | *reg += (pin_num / RK3036_PULL_PINS_PER_REG) * 4; |
| 52 | |
| 53 | *bit = pin_num % RK3036_PULL_PINS_PER_REG; |
| 54 | }; |
| 55 | |
David Wu | 2972c45 | 2019-04-16 21:57:05 +0800 | [diff] [blame] | 56 | static int rk3036_set_pull(struct rockchip_pin_bank *bank, |
| 57 | int pin_num, int pull) |
| 58 | { |
| 59 | struct regmap *regmap; |
| 60 | int reg, ret; |
| 61 | u8 bit; |
| 62 | u32 data; |
| 63 | |
| 64 | if (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT && |
| 65 | pull != PIN_CONFIG_BIAS_DISABLE) |
| 66 | return -ENOTSUPP; |
| 67 | |
| 68 | rk3036_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit); |
| 69 | data = BIT(bit + 16); |
| 70 | if (pull == PIN_CONFIG_BIAS_DISABLE) |
| 71 | data |= BIT(bit); |
| 72 | ret = regmap_write(regmap, reg, data); |
| 73 | |
| 74 | return ret; |
| 75 | } |
| 76 | |
David Wu | 5f596ae | 2019-01-02 21:00:55 +0800 | [diff] [blame] | 77 | static struct rockchip_pin_bank rk3036_pin_banks[] = { |
| 78 | PIN_BANK(0, 32, "gpio0"), |
| 79 | PIN_BANK(1, 32, "gpio1"), |
| 80 | PIN_BANK(2, 32, "gpio2"), |
| 81 | }; |
| 82 | |
| 83 | static struct rockchip_pin_ctrl rk3036_pin_ctrl = { |
David Wu | 71aede0 | 2019-04-16 21:50:54 +0800 | [diff] [blame] | 84 | .pin_banks = rk3036_pin_banks, |
| 85 | .nr_banks = ARRAY_SIZE(rk3036_pin_banks), |
David Wu | 71aede0 | 2019-04-16 21:50:54 +0800 | [diff] [blame] | 86 | .grf_mux_offset = 0xa8, |
David Wu | 3dd7d6c | 2019-04-16 21:50:55 +0800 | [diff] [blame] | 87 | .set_mux = rk3036_set_mux, |
David Wu | 2972c45 | 2019-04-16 21:57:05 +0800 | [diff] [blame] | 88 | .set_pull = rk3036_set_pull, |
David Wu | 5f596ae | 2019-01-02 21:00:55 +0800 | [diff] [blame] | 89 | }; |
| 90 | |
| 91 | static const struct udevice_id rk3036_pinctrl_ids[] = { |
| 92 | { |
| 93 | .compatible = "rockchip,rk3036-pinctrl", |
| 94 | .data = (ulong)&rk3036_pin_ctrl |
| 95 | }, |
| 96 | {} |
| 97 | }; |
| 98 | |
| 99 | U_BOOT_DRIVER(pinctrl_rockchip) = { |
| 100 | .name = "rk3036-pinctrl", |
| 101 | .id = UCLASS_PINCTRL, |
| 102 | .of_match = rk3036_pinctrl_ids, |
Simon Glass | 8a2b47f | 2020-12-03 16:55:17 -0700 | [diff] [blame] | 103 | .priv_auto = sizeof(struct rockchip_pinctrl_priv), |
David Wu | 5f596ae | 2019-01-02 21:00:55 +0800 | [diff] [blame] | 104 | .ops = &rockchip_pinctrl_ops, |
Simon Glass | 9288265 | 2021-08-07 07:24:04 -0600 | [diff] [blame] | 105 | #if CONFIG_IS_ENABLED(OF_REAL) |
David Wu | 5f596ae | 2019-01-02 21:00:55 +0800 | [diff] [blame] | 106 | .bind = dm_scan_fdt_dev, |
| 107 | #endif |
| 108 | .probe = rockchip_pinctrl_probe, |
| 109 | }; |